Lines Matching refs:postdiv

248 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
317 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
323 cpu_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
325 cpu_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
327 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
333 ddr_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
335 ddr_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
337 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
343 ahb_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
345 ahb_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
364 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca953x_clocks_init() local
404 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca953x_clocks_init()
410 cpu_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
412 cpu_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
414 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca953x_clocks_init()
420 ddr_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
422 ddr_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
424 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca953x_clocks_init()
430 ahb_rate = ddr_pll / (postdiv + 1); in qca953x_clocks_init()
432 ahb_rate = cpu_pll / (postdiv + 1); in qca953x_clocks_init()
449 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca955x_clocks_init() local
489 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca955x_clocks_init()
495 cpu_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
497 cpu_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
499 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca955x_clocks_init()
505 ddr_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
507 ddr_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
509 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca955x_clocks_init()
515 ahb_rate = ddr_pll / (postdiv + 1); in qca955x_clocks_init()
517 ahb_rate = cpu_pll / (postdiv + 1); in qca955x_clocks_init()
534 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; in qca956x_clocks_init() local
593 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca956x_clocks_init()
599 cpu_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
601 cpu_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()
603 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca956x_clocks_init()
609 ddr_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()
611 ddr_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
613 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca956x_clocks_init()
619 ahb_rate = ddr_pll / (postdiv + 1); in qca956x_clocks_init()
621 ahb_rate = cpu_pll / (postdiv + 1); in qca956x_clocks_init()