Lines Matching refs:clk_ctrl
248 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
315 clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_clocks_init()
317 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
320 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) in ar934x_clocks_init()
322 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) in ar934x_clocks_init()
327 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
330 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) in ar934x_clocks_init()
332 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) in ar934x_clocks_init()
337 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
340 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) in ar934x_clocks_init()
342 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) in ar934x_clocks_init()
364 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca953x_clocks_init() local
402 clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); in qca953x_clocks_init()
404 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca953x_clocks_init()
407 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca953x_clocks_init()
409 else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) in qca953x_clocks_init()
414 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca953x_clocks_init()
417 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca953x_clocks_init()
419 else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) in qca953x_clocks_init()
424 postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca953x_clocks_init()
427 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca953x_clocks_init()
429 else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) in qca953x_clocks_init()
449 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca955x_clocks_init() local
487 clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); in qca955x_clocks_init()
489 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca955x_clocks_init()
492 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca955x_clocks_init()
494 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) in qca955x_clocks_init()
499 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca955x_clocks_init()
502 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca955x_clocks_init()
504 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) in qca955x_clocks_init()
509 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca955x_clocks_init()
512 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca955x_clocks_init()
514 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) in qca955x_clocks_init()
534 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; in qca956x_clocks_init() local
591 clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); in qca956x_clocks_init()
593 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca956x_clocks_init()
596 if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca956x_clocks_init()
598 else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL) in qca956x_clocks_init()
603 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca956x_clocks_init()
606 if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca956x_clocks_init()
608 else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL) in qca956x_clocks_init()
613 postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca956x_clocks_init()
616 if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca956x_clocks_init()
618 else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) in qca956x_clocks_init()