Lines Matching refs:u_char
169 u_char pad1;
170 u_char bas_hi;
171 u_char pad2;
172 u_char bas_md;
173 u_char pad3;
174 u_char volatile vcounthi;
175 u_char pad4;
176 u_char volatile vcountmid;
177 u_char pad5;
178 u_char volatile vcountlow;
179 u_char volatile syncmode;
180 u_char pad6;
181 u_char pad7;
182 u_char bas_lo;
197 u_char char_dummy0;
198 u_char bas_hi; /* video mem base addr, high and mid byte */
199 u_char char_dummy1;
200 u_char bas_md;
201 u_char char_dummy2;
202 u_char vcount_hi; /* pointer to currently displayed byte */
203 u_char char_dummy3;
204 u_char vcount_md;
205 u_char char_dummy4;
206 u_char vcount_lo;
208 u_char char_dummy5;
209 u_char bas_lo; /* video mem addr, low byte */
210 u_char char_dummy6[2+3*16];
213 u_char st_shiftmode; /* ST compatible shift mode register, unused */
214 u_char char_dummy7;
252 #define f030_hscroll ((u_char*) 0xffff8265)
258 u_char xoffset_s;
259 u_char xoffset;
261 u_char pad2[0x1a];
268 u_char pad3[0x14];
275 u_char pad4[0x12];
290 u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */
291 u_char dma_hi;
292 u_char char_dummy2;
293 u_char dma_md;
294 u_char char_dummy3;
295 u_char dma_lo;
314 u_char rd_data_reg_sel;
315 u_char char_dummy1;
316 u_char wd_data;
324 u_char char_dummy0;
325 u_char dma_addr_hi;
326 u_char char_dummy1;
327 u_char dma_addr_hmd;
328 u_char char_dummy2;
329 u_char dma_addr_lmd;
330 u_char char_dummy3;
331 u_char dma_addr_lo;
332 u_char char_dummy4;
333 u_char dma_cnt_hi;
334 u_char char_dummy5;
335 u_char dma_cnt_hmd;
336 u_char char_dummy6;
337 u_char dma_cnt_lmd;
338 u_char char_dummy7;
339 u_char dma_cnt_lo;
349 u_char scsi_data;
350 u_char char_dummy1;
351 u_char scsi_icr;
352 u_char char_dummy2;
353 u_char scsi_mode;
354 u_char char_dummy3;
355 u_char scsi_tcr;
356 u_char char_dummy4;
357 u_char scsi_idstat;
358 u_char char_dummy5;
359 u_char scsi_dmastat;
360 u_char char_dummy6;
361 u_char scsi_targrcv;
362 u_char char_dummy7;
363 u_char scsi_inircv;
378 u_char external_frequency_divider;
379 u_char internal_frequency_divider;
386 u_char tracks;
387 u_char input_source;
390 u_char adc_source;
393 u_char gain;
396 u_char attenuation;
399 u_char unused1;
400 u_char status;
403 u_char unused2, unused3, unused4, unused5;
404 u_char gpio_directions;
407 u_char unused6;
408 u_char gpio_data;
447 u_char cha_a_ctrl;
448 u_char char_dummy1;
449 u_char cha_a_data;
450 u_char char_dummy2;
451 u_char cha_b_ctrl;
452 u_char char_dummy3;
453 u_char cha_b_data;
484 u_char icr;
493 u_char cvr;
497 u_char isr;
506 u_char ivr;
509 u_char b[4];
523 u_char par_dt_reg;
524 u_char char_dummy1;
525 u_char active_edge;
526 u_char char_dummy2;
527 u_char data_dir;
528 u_char char_dummy3;
529 u_char int_en_a;
530 u_char char_dummy4;
531 u_char int_en_b;
532 u_char char_dummy5;
533 u_char int_pn_a;
534 u_char char_dummy6;
535 u_char int_pn_b;
536 u_char char_dummy7;
537 u_char int_sv_a;
538 u_char char_dummy8;
539 u_char int_sv_b;
540 u_char char_dummy9;
541 u_char int_mk_a;
542 u_char char_dummy10;
543 u_char int_mk_b;
544 u_char char_dummy11;
545 u_char vec_adr;
546 u_char char_dummy12;
547 u_char tim_ct_a;
548 u_char char_dummy13;
549 u_char tim_ct_b;
550 u_char char_dummy14;
551 u_char tim_ct_cd;
552 u_char char_dummy15;
553 u_char tim_dt_a;
554 u_char char_dummy16;
555 u_char tim_dt_b;
556 u_char char_dummy17;
557 u_char tim_dt_c;
558 u_char char_dummy18;
559 u_char tim_dt_d;
560 u_char char_dummy19;
561 u_char sync_char;
562 u_char char_dummy20;
563 u_char usart_ctr;
564 u_char char_dummy21;
565 u_char rcv_stat;
566 u_char char_dummy22;
567 u_char trn_stat;
568 u_char char_dummy23;
569 u_char usart_dta;
583 u_char sys_mask;
584 u_char char_dummy1;
585 u_char sys_stat;
586 u_char char_dummy2;
587 u_char softint;
588 u_char char_dummy3;
589 u_char vmeint;
590 u_char char_dummy4;
591 u_char gp_reg1;
592 u_char char_dummy5;
593 u_char gp_reg2;
594 u_char char_dummy6;
595 u_char vme_mask;
596 u_char char_dummy7;
597 u_char vme_stat;
605 u_char regsel;
606 u_char dummy;
607 u_char data;
656 u_char key_ctrl;
657 u_char char_dummy1;
658 u_char key_data;
659 u_char char_dummy2;
660 u_char mid_ctrl;
661 u_char char_dummy3;
662 u_char mid_data;
668 u_char int_ctrl; /* Falcon: Interrupt control */
669 u_char ctrl;
670 u_char pad2;
671 u_char bas_hi;
672 u_char pad3;
673 u_char bas_mid;
674 u_char pad4;
675 u_char bas_low;
676 u_char pad5;
677 u_char addr_hi;
678 u_char pad6;
679 u_char addr_mid;
680 u_char pad7;
681 u_char addr_low;
682 u_char pad8;
683 u_char end_hi;
684 u_char pad9;
685 u_char end_mid;
686 u_char pad10;
687 u_char end_low;
688 u_char pad11[12];
689 u_char track_select; /* Falcon */
690 u_char mode;
691 u_char pad12[14];
695 u_char ext_div;
696 u_char int_div;
697 u_char rec_track_select;
698 u_char dac_src;
699 u_char adc_src;
700 u_char input_gain;
774 u_char sec_ones;
775 u_char dummy1;
776 u_char sec_tens;
777 u_char dummy2;
778 u_char min_ones;
779 u_char dummy3;
780 u_char min_tens;
781 u_char dummy4;
782 u_char hr_ones;
783 u_char dummy5;
784 u_char hr_tens;
785 u_char dummy6;
786 u_char weekday;
787 u_char dummy7;
788 u_char day_ones;
789 u_char dummy8;
790 u_char day_tens;
791 u_char dummy9;
792 u_char mon_ones;
793 u_char dummy10;
794 u_char mon_tens;
795 u_char dummy11;
796 u_char year_ones;
797 u_char dummy12;
798 u_char year_tens;
799 u_char dummy13;
800 u_char mode;
801 u_char dummy14;
802 u_char test;
803 u_char dummy15;
804 u_char reset;