242 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,  in fp_emulate()  argument
274 					(unsigned long *) isr, (unsigned long *) pr,  in fp_emulate()
293 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)  in handle_fpu_swa()  argument
332 		       			current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr);  in handle_fpu_swa()
337 	exception = fp_emulate(fp_fault, bundle, &regs->cr_ipsr, &regs->ar_fpsr, &isr, &regs->pr,  in handle_fpu_swa()
358 			if (isr & 0x11) {  in handle_fpu_swa()
360 			} else if (isr & 0x22) {  in handle_fpu_swa()
364 			} else if (isr & 0x44) {  in handle_fpu_swa()
367 			siginfo.si_isr = isr;  in handle_fpu_swa()
385 			if (isr & 0x880) {  in handle_fpu_swa()
387 			} else if (isr & 0x1100) {  in handle_fpu_swa()
389 			} else if (isr & 0x2200) {  in handle_fpu_swa()
392 			siginfo.si_isr = isr;  in handle_fpu_swa()
438 ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,  in ia64_fault()  argument
442 	unsigned long code, error = isr, iip;  in ia64_fault()
456 	if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {  in ia64_fault()
469 		code = (isr >> 4) & 0xf;  in ia64_fault()
471 			(code == 3) ? ((isr & (1UL << 37))  in ia64_fault()
484 		if (isr & 2) {  in ia64_fault()
496 			if (((isr >> 4) & 0xf) == 2) {  in ia64_fault()
515 			siginfo.si_isr = isr;  in ia64_fault()
534 			siginfo.si_isr = isr;  in ia64_fault()
592 		siginfo.si_isr   = isr;  in ia64_fault()
599 		result = handle_fpu_swa((vector == 32) ? 1 : 0, &regs, isr);  in ia64_fault()
609 			siginfo.si_isr = isr;  in ia64_fault()
616 		if (isr & 0x2) {  in ia64_fault()
657 		       iip, ifa, isr);  in ia64_fault()
664 		       iip, ifa, isr, iim);  in ia64_fault()
669 		sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);  in ia64_fault()