Lines Matching refs:v
25 #define atomic_read(v) READ_ONCE((v)->counter) argument
26 #define atomic64_read(v) READ_ONCE((v)->counter) argument
28 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
29 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
33 ia64_atomic_##op (int i, atomic_t *v) \
39 CMPXCHG_BUGCHECK(v); \
40 old = atomic_read(v); \
42 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
48 ia64_atomic_fetch_##op (int i, atomic_t *v) \
54 CMPXCHG_BUGCHECK(v); \
55 old = atomic_read(v); \
57 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
78 #define atomic_add_return(i,v) \ argument
82 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
83 : ia64_atomic_add(__ia64_aar_i, v); \
86 #define atomic_sub_return(i,v) \ argument
90 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
91 : ia64_atomic_sub(__ia64_asr_i, v); \
94 #define atomic_fetch_add(i,v) \ argument
98 ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \
99 : ia64_atomic_fetch_add(__ia64_aar_i, v); \
102 #define atomic_fetch_sub(i,v) \ argument
106 ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \
107 : ia64_atomic_fetch_sub(__ia64_asr_i, v); \
114 #define atomic_and(i,v) (void)ia64_atomic_fetch_and(i,v) argument
115 #define atomic_or(i,v) (void)ia64_atomic_fetch_or(i,v) argument
116 #define atomic_xor(i,v) (void)ia64_atomic_fetch_xor(i,v) argument
118 #define atomic_fetch_and(i,v) ia64_atomic_fetch_and(i,v) argument
119 #define atomic_fetch_or(i,v) ia64_atomic_fetch_or(i,v) argument
120 #define atomic_fetch_xor(i,v) ia64_atomic_fetch_xor(i,v) argument
128 ia64_atomic64_##op (__s64 i, atomic64_t *v) \
134 CMPXCHG_BUGCHECK(v); \
135 old = atomic64_read(v); \
137 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
143 ia64_atomic64_fetch_##op (__s64 i, atomic64_t *v) \
149 CMPXCHG_BUGCHECK(v); \
150 old = atomic64_read(v); \
152 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
163 #define atomic64_add_return(i,v) \ argument
167 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
168 : ia64_atomic64_add(__ia64_aar_i, v); \
171 #define atomic64_sub_return(i,v) \ argument
175 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
176 : ia64_atomic64_sub(__ia64_asr_i, v); \
179 #define atomic64_fetch_add(i,v) \ argument
183 ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \
184 : ia64_atomic64_fetch_add(__ia64_aar_i, v); \
187 #define atomic64_fetch_sub(i,v) \ argument
191 ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \
192 : ia64_atomic64_fetch_sub(__ia64_asr_i, v); \
199 #define atomic64_and(i,v) (void)ia64_atomic64_fetch_and(i,v) argument
200 #define atomic64_or(i,v) (void)ia64_atomic64_fetch_or(i,v) argument
201 #define atomic64_xor(i,v) (void)ia64_atomic64_fetch_xor(i,v) argument
203 #define atomic64_fetch_and(i,v) ia64_atomic64_fetch_and(i,v) argument
204 #define atomic64_fetch_or(i,v) ia64_atomic64_fetch_or(i,v) argument
205 #define atomic64_fetch_xor(i,v) ia64_atomic64_fetch_xor(i,v) argument
211 #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) argument
212 #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) argument
214 #define atomic64_cmpxchg(v, old, new) \ argument
215 (cmpxchg(&((v)->counter), old, new))
216 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) argument
218 #define atomic_add(i,v) (void)atomic_add_return((i), (v)) argument
219 #define atomic_sub(i,v) (void)atomic_sub_return((i), (v)) argument
221 #define atomic64_add(i,v) (void)atomic64_add_return((i), (v)) argument
222 #define atomic64_sub(i,v) (void)atomic64_sub_return((i), (v)) argument