Lines Matching refs:msr
107 msr tpidr_el0, x2
108 msr tpidrro_el0, x3
109 msr contextidr_el1, x4
110 msr cpacr_el1, x6
116 msr tcr_el1, x8
117 msr vbar_el1, x9
126 msr mdscr_el1, x10
128 msr sctlr_el1, x12
130 msr tpidr_el1, x13
132 msr tpidr_el2, x13
134 msr sp_el0, x14
139 msr oslar_el1, x11
167 msr ttbr1_el1, x2 // in TTBR1 (since TCR.A1 is set)
169 msr ttbr0_el1, x3 // now update TTBR0
179 msr ttbr1_el1, \tmp2
198 msr ttbr1_el1, x3
267 msr sctlr_el1, x18
292 msr sctlr_el1, x18
371 msr ttbr1_el1, swapper_ttb
408 msr cpacr_el1, x0 // Enable FP/ASIMD
410 msr mdscr_el1, x0 // access to the DCC from EL0
432 msr mair_el1, x5
462 msr tcr_el1, x10