Lines Matching refs:b
90 movi vzr.16b, #0 // init zero register
99 b.lt _less_than_128
106 movi v10.16b, #0
116 CPU_LE( rev64 v0.16b, v0.16b )
117 CPU_LE( rev64 v1.16b, v1.16b )
118 CPU_LE( rev64 v2.16b, v2.16b )
119 CPU_LE( rev64 v3.16b, v3.16b )
120 CPU_LE( rev64 v4.16b, v4.16b )
121 CPU_LE( rev64 v5.16b, v5.16b )
122 CPU_LE( rev64 v6.16b, v6.16b )
123 CPU_LE( rev64 v7.16b, v7.16b )
125 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
126 CPU_LE( ext v1.16b, v1.16b, v1.16b, #8 )
127 CPU_LE( ext v2.16b, v2.16b, v2.16b, #8 )
128 CPU_LE( ext v3.16b, v3.16b, v3.16b, #8 )
129 CPU_LE( ext v4.16b, v4.16b, v4.16b, #8 )
130 CPU_LE( ext v5.16b, v5.16b, v5.16b, #8 )
131 CPU_LE( ext v6.16b, v6.16b, v6.16b, #8 )
132 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
135 eor v0.16b, v0.16b, v10.16b
161 CPU_LE( rev64 v11.16b, v11.16b )
162 CPU_LE( rev64 v12.16b, v12.16b )
167 CPU_LE( ext v11.16b, v11.16b, v11.16b, #8 )
168 CPU_LE( ext v12.16b, v12.16b, v12.16b, #8 )
170 eor \reg1\().16b, \reg1\().16b, v8.16b
171 eor \reg2\().16b, \reg2\().16b, v9.16b
172 eor \reg1\().16b, \reg1\().16b, v11.16b
173 eor \reg2\().16b, \reg2\().16b, v12.16b
184 b.lt _fold_64_B_end
197 movi vzr.16b, #0 // init zero register
200 b _fold_64_B_loop
218 eor v7.16b, v7.16b, v8.16b
219 eor v7.16b, v7.16b, \reg\().16b
234 b.lt _final_reduction_for_128
243 eor v7.16b, v7.16b, v8.16b
246 CPU_LE( rev64 v0.16b, v0.16b )
247 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
248 eor v7.16b, v7.16b, v0.16b
254 b.ge _16B_reduction_loop
263 b.eq _128_done
272 CPU_LE( rev64 v1.16b, v1.16b )
273 CPU_LE( ext v1.16b, v1.16b, v1.16b, #8 )
279 ld1 {v0.16b}, [x4]
282 tbl v2.16b, {v7.16b}, v0.16b
285 movi v9.16b, #0x80
286 eor v0.16b, v0.16b, v9.16b
287 tbl v7.16b, {v7.16b}, v0.16b
290 sshr v0.16b, v0.16b, #7 // convert to 8-bit mask
291 bsl v0.16b, v2.16b, v1.16b
296 eor v7.16b, v7.16b, v8.16b
297 eor v7.16b, v7.16b, v0.16b
304 ext v0.16b, vzr.16b, v7.16b, #8
307 eor v7.16b, v7.16b, v0.16b
310 ext v0.16b, v7.16b, vzr.16b, #4
313 eor v7.16b, v7.16b, v0.16b
321 ext v0.16b, vzr.16b, v0.16b, #12
323 ext v0.16b, vzr.16b, v0.16b, #12
324 eor v7.16b, v7.16b, v0.16b
336 movi v0.16b, #0
340 CPU_LE( rev64 v7.16b, v7.16b )
341 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
342 eor v7.16b, v7.16b, v0.16b // xor the initial crc value
345 b.eq _128_done // exactly 16 left
346 b.lt _less_than_16_left
353 b.ge _16B_reduction_loop
356 b _get_last_two_regs
362 ld1 {v0.16b}, [x0]
363 movi v9.16b, #0x80
364 eor v0.16b, v0.16b, v9.16b
365 tbl v7.16b, {v7.16b}, v0.16b
366 b _128_done