Lines Matching refs:pericfg
334 pericfg: power-controller@10003000 { label
335 compatible = "mediatek,mt8173-pericfg", "syscon";
560 clocks = <&pericfg CLK_PERI_AUXADC>;
570 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
580 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
590 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
600 clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
611 clocks = <&pericfg CLK_PERI_I2C0>,
612 <&pericfg CLK_PERI_AP_DMA>;
627 clocks = <&pericfg CLK_PERI_I2C1>,
628 <&pericfg CLK_PERI_AP_DMA>;
643 clocks = <&pericfg CLK_PERI_I2C2>,
644 <&pericfg CLK_PERI_AP_DMA>;
661 <&pericfg CLK_PERI_SPI0>;
671 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
673 resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
683 clocks = <&pericfg CLK_PERI_SPI>,
697 clocks = <&pericfg CLK_PERI_I2C3>,
698 <&pericfg CLK_PERI_AP_DMA>;
713 clocks = <&pericfg CLK_PERI_I2C4>,
714 <&pericfg CLK_PERI_AP_DMA>;
727 clocks = <&pericfg CLK_PERI_I2C5>;
737 clocks = <&pericfg CLK_PERI_I2C6>,
738 <&pericfg CLK_PERI_AP_DMA>;
782 clocks = <&pericfg CLK_PERI_MSDC30_0>,
792 clocks = <&pericfg CLK_PERI_MSDC30_1>,
802 clocks = <&pericfg CLK_PERI_MSDC30_2>,
812 clocks = <&pericfg CLK_PERI_MSDC30_3>,
830 mediatek,syscon-wakeup = <&pericfg 0x400 1>;