Lines Matching refs:__REG

9 #define UDCCR           __REG(0x40600000) /* UDC Control Register */
33 #define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */
34 #define UDCICR1 __REG(0x40600008) /* UDC Interrupt Control Register1 */
48 #define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */
49 #define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */
57 #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */
58 #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */
85 #define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */
86 #define UP3OCR __REG(0x40600024) /* USB Port 2 Output Control register */
104 #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */
114 #define UDCCSRA __REG(0x40600104) /* UDC Control/Status register - Endpoint A */
115 #define UDCCSRB __REG(0x40600108) /* UDC Control/Status register - Endpoint B */
116 #define UDCCSRC __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */
117 #define UDCCSRD __REG(0x40600110) /* UDC Control/Status register - Endpoint D */
118 #define UDCCSRE __REG(0x40600114) /* UDC Control/Status register - Endpoint E */
119 #define UDCCSRF __REG(0x40600118) /* UDC Control/Status register - Endpoint F */
120 #define UDCCSRG __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */
121 #define UDCCSRH __REG(0x40600120) /* UDC Control/Status register - Endpoint H */
122 #define UDCCSRI __REG(0x40600124) /* UDC Control/Status register - Endpoint I */
123 #define UDCCSRJ __REG(0x40600128) /* UDC Control/Status register - Endpoint J */
124 #define UDCCSRK __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */
125 #define UDCCSRL __REG(0x40600130) /* UDC Control/Status register - Endpoint L */
126 #define UDCCSRM __REG(0x40600134) /* UDC Control/Status register - Endpoint M */
127 #define UDCCSRN __REG(0x40600138) /* UDC Control/Status register - Endpoint N */
128 #define UDCCSRP __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */
129 #define UDCCSRQ __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */
130 #define UDCCSRR __REG(0x40600144) /* UDC Control/Status register - Endpoint R */
131 #define UDCCSRS __REG(0x40600148) /* UDC Control/Status register - Endpoint S */
132 #define UDCCSRT __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */
133 #define UDCCSRU __REG(0x40600150) /* UDC Control/Status register - Endpoint U */
134 #define UDCCSRV __REG(0x40600154) /* UDC Control/Status register - Endpoint V */
135 #define UDCCSRW __REG(0x40600158) /* UDC Control/Status register - Endpoint W */
136 #define UDCCSRX __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */
151 #define UDCBCR0 __REG(0x40600200) /* Byte Count Register - EP0 */
152 #define UDCBCRA __REG(0x40600204) /* Byte Count Register - EPA */
153 #define UDCBCRB __REG(0x40600208) /* Byte Count Register - EPB */
154 #define UDCBCRC __REG(0x4060020C) /* Byte Count Register - EPC */
155 #define UDCBCRD __REG(0x40600210) /* Byte Count Register - EPD */
156 #define UDCBCRE __REG(0x40600214) /* Byte Count Register - EPE */
157 #define UDCBCRF __REG(0x40600218) /* Byte Count Register - EPF */
158 #define UDCBCRG __REG(0x4060021C) /* Byte Count Register - EPG */
159 #define UDCBCRH __REG(0x40600220) /* Byte Count Register - EPH */
160 #define UDCBCRI __REG(0x40600224) /* Byte Count Register - EPI */
161 #define UDCBCRJ __REG(0x40600228) /* Byte Count Register - EPJ */
162 #define UDCBCRK __REG(0x4060022C) /* Byte Count Register - EPK */
163 #define UDCBCRL __REG(0x40600230) /* Byte Count Register - EPL */
164 #define UDCBCRM __REG(0x40600234) /* Byte Count Register - EPM */
165 #define UDCBCRN __REG(0x40600238) /* Byte Count Register - EPN */
166 #define UDCBCRP __REG(0x4060023C) /* Byte Count Register - EPP */
167 #define UDCBCRQ __REG(0x40600240) /* Byte Count Register - EPQ */
168 #define UDCBCRR __REG(0x40600244) /* Byte Count Register - EPR */
169 #define UDCBCRS __REG(0x40600248) /* Byte Count Register - EPS */
170 #define UDCBCRT __REG(0x4060024C) /* Byte Count Register - EPT */
171 #define UDCBCRU __REG(0x40600250) /* Byte Count Register - EPU */
172 #define UDCBCRV __REG(0x40600254) /* Byte Count Register - EPV */
173 #define UDCBCRW __REG(0x40600258) /* Byte Count Register - EPW */
174 #define UDCBCRX __REG(0x4060025C) /* Byte Count Register - EPX */
179 #define UDCDR0 __REG(0x40600300) /* Data Register - EP0 */
180 #define UDCDRA __REG(0x40600304) /* Data Register - EPA */
181 #define UDCDRB __REG(0x40600308) /* Data Register - EPB */
182 #define UDCDRC __REG(0x4060030C) /* Data Register - EPC */
183 #define UDCDRD __REG(0x40600310) /* Data Register - EPD */
184 #define UDCDRE __REG(0x40600314) /* Data Register - EPE */
185 #define UDCDRF __REG(0x40600318) /* Data Register - EPF */
186 #define UDCDRG __REG(0x4060031C) /* Data Register - EPG */
187 #define UDCDRH __REG(0x40600320) /* Data Register - EPH */
188 #define UDCDRI __REG(0x40600324) /* Data Register - EPI */
189 #define UDCDRJ __REG(0x40600328) /* Data Register - EPJ */
190 #define UDCDRK __REG(0x4060032C) /* Data Register - EPK */
191 #define UDCDRL __REG(0x40600330) /* Data Register - EPL */
192 #define UDCDRM __REG(0x40600334) /* Data Register - EPM */
193 #define UDCDRN __REG(0x40600338) /* Data Register - EPN */
194 #define UDCDRP __REG(0x4060033C) /* Data Register - EPP */
195 #define UDCDRQ __REG(0x40600340) /* Data Register - EPQ */
196 #define UDCDRR __REG(0x40600344) /* Data Register - EPR */
197 #define UDCDRS __REG(0x40600348) /* Data Register - EPS */
198 #define UDCDRT __REG(0x4060034C) /* Data Register - EPT */
199 #define UDCDRU __REG(0x40600350) /* Data Register - EPU */
200 #define UDCDRV __REG(0x40600354) /* Data Register - EPV */
201 #define UDCDRW __REG(0x40600358) /* Data Register - EPW */
202 #define UDCDRX __REG(0x4060035C) /* Data Register - EPX */
205 #define UDCCRA __REG(0x40600404) /* Configuration register EPA */
206 #define UDCCRB __REG(0x40600408) /* Configuration register EPB */
207 #define UDCCRC __REG(0x4060040C) /* Configuration register EPC */
208 #define UDCCRD __REG(0x40600410) /* Configuration register EPD */
209 #define UDCCRE __REG(0x40600414) /* Configuration register EPE */
210 #define UDCCRF __REG(0x40600418) /* Configuration register EPF */
211 #define UDCCRG __REG(0x4060041C) /* Configuration register EPG */
212 #define UDCCRH __REG(0x40600420) /* Configuration register EPH */
213 #define UDCCRI __REG(0x40600424) /* Configuration register EPI */
214 #define UDCCRJ __REG(0x40600428) /* Configuration register EPJ */
215 #define UDCCRK __REG(0x4060042C) /* Configuration register EPK */
216 #define UDCCRL __REG(0x40600430) /* Configuration register EPL */
217 #define UDCCRM __REG(0x40600434) /* Configuration register EPM */
218 #define UDCCRN __REG(0x40600438) /* Configuration register EPN */
219 #define UDCCRP __REG(0x4060043C) /* Configuration register EPP */
220 #define UDCCRQ __REG(0x40600440) /* Configuration register EPQ */
221 #define UDCCRR __REG(0x40600444) /* Configuration register EPR */
222 #define UDCCRS __REG(0x40600448) /* Configuration register EPS */
223 #define UDCCRT __REG(0x4060044C) /* Configuration register EPT */
224 #define UDCCRU __REG(0x40600450) /* Configuration register EPU */
225 #define UDCCRV __REG(0x40600454) /* Configuration register EPV */
226 #define UDCCRW __REG(0x40600458) /* Configuration register EPW */
227 #define UDCCRX __REG(0x4060045C) /* Configuration register EPX */