54 static void __iomem *sar_base;  variable
89 	writel_relaxed(val, sar_base + offset + (idx * 4));  in sar_writel()
234 	writel_relaxed(val, sar_base + AUXCOREBOOT0_OFFSET);  in omap4_irq_save_context()
236 	writel_relaxed(val, sar_base + AUXCOREBOOT1_OFFSET);  in omap4_irq_save_context()
240 	writel_relaxed(val, sar_base + PTMSYNCREQ_MASK_OFFSET);  in omap4_irq_save_context()
242 	writel_relaxed(val, sar_base + PTMSYNCREQ_EN_OFFSET);  in omap4_irq_save_context()
245 	val = readl_relaxed(sar_base + SAR_BACKUP_STATUS_OFFSET);  in omap4_irq_save_context()
247 	writel_relaxed(val, sar_base + SAR_BACKUP_STATUS_OFFSET);  in omap4_irq_save_context()
267 	writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT0_OFFSET);  in omap5_irq_save_context()
269 	writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT1_OFFSET);  in omap5_irq_save_context()
272 	val = readl_relaxed(sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);  in omap5_irq_save_context()
274 	writel_relaxed(val, sar_base + OMAP5_SAR_BACKUP_STATUS_OFFSET);  in omap5_irq_save_context()
320 	val = readl_relaxed(sar_base + offset);  in irq_sar_clear()
322 	writel_relaxed(val, sar_base + offset);  in irq_sar_clear()
599 	sar_base = omap4_get_sar_ram_base();  in wakeupgen_init()