Lines Matching refs:IOMUX_TO_GPIO
95 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)); in qong_init_dnet()
97 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)); in qong_init_dnet()
150 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB)); in qong_nand_device_ready()
156 gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); in qong_nand_select_chip()
158 gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1); in qong_nand_select_chip()
201 if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), "nand_enable")) in qong_init_nand_mtd()
202 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); in qong_init_nand_mtd()
206 if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFRB), "nand_rdy")) in qong_init_nand_mtd()
207 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFRB)); in qong_init_nand_mtd()
211 if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFWP_B), "nand_wp")) in qong_init_nand_mtd()
212 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFWP_B)); in qong_init_nand_mtd()