Lines Matching refs:rv
41 #define checkuart(rp, rv, family_id, family) \ argument
45 cmp rp, rv ; \
51 .macro addruart, rp, rv, tmp
53 ldr \rv, [\rp] @ linked addr is stored there
54 sub \rv, \rv, \rp @ offset between the two
56 sub \tmp, \rp, \rv @ actual brcmstb_uart_config
60 mov \rv, #0 @ yes; record init is done
61 str \rv, [\tmp]
64 mrc p15, 0, \rv, c0, c0, 0 @ get Main ID register
66 and \rv, \rv, \rp
68 cmp \rv, \rp
72 mrc p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
73 ands \rv, \rv, #REG_PHYS_BASE
78 ldr \rv, [\rp, #0] @ get register contents
79 ARM_BE8( rev \rv, \rv )
80 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
83 20: checkuart(\rp, \rv, 0x33900000, 3390)
84 21: checkuart(\rp, \rv, 0x72500000, 7250)
85 22: checkuart(\rp, \rv, 0x72600000, 7260)
86 23: checkuart(\rp, \rv, 0x72680000, 7268)
87 24: checkuart(\rp, \rv, 0x72710000, 7271)
88 25: checkuart(\rp, \rv, 0x73640000, 7364)
89 26: checkuart(\rp, \rv, 0x73660000, 7366)
90 27: checkuart(\rp, \rv, 0x07437100, 74371)
91 28: checkuart(\rp, \rv, 0x74390000, 7439)
92 29: checkuart(\rp, \rv, 0x74450000, 7445)
93 30: checkuart(\rp, \rv, 0x72780000, 7278)
105 92: and \rv, \rp, #0xffffff @ offset within 16MB section
106 add \rv, \rv, #REG_VIRT_BASE
107 str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
117 ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt