Lines Matching refs:ccu
49 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
50 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
64 clocks = <&ccu CLK_BUS_LCD>, <&ccu CLK_BUS_DE_BE>,
65 <&ccu CLK_LCD_CH0>, <&ccu CLK_DE_BE>,
66 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_DRC>;
153 clocks = <&ccu CLK_BUS_DMA>;
154 resets = <&ccu RST_BUS_DMA>;
161 clocks = <&ccu CLK_BUS_MMC0>,
162 <&ccu CLK_MMC0>,
163 <&ccu CLK_MMC0_OUTPUT>,
164 <&ccu CLK_MMC0_SAMPLE>;
169 resets = <&ccu RST_BUS_MMC0>;
180 clocks = <&ccu CLK_BUS_MMC1>,
181 <&ccu CLK_MMC1>,
182 <&ccu CLK_MMC1_OUTPUT>,
183 <&ccu CLK_MMC1_SAMPLE>;
188 resets = <&ccu RST_BUS_MMC1>;
199 clocks = <&ccu CLK_BUS_MMC2>,
200 <&ccu CLK_MMC2>,
201 <&ccu CLK_MMC2_OUTPUT>,
202 <&ccu CLK_MMC2_SAMPLE>;
207 resets = <&ccu RST_BUS_MMC2>;
219 clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
221 resets = <&ccu RST_BUS_NAND>;
233 clocks = <&ccu CLK_BUS_OTG>;
234 resets = <&ccu RST_BUS_OTG>;
248 clocks = <&ccu CLK_USB_PHY0>,
249 <&ccu CLK_USB_PHY1>;
252 resets = <&ccu RST_USB_PHY0>,
253 <&ccu RST_USB_PHY1>;
264 clocks = <&ccu CLK_BUS_EHCI>;
265 resets = <&ccu RST_BUS_EHCI>;
275 clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>;
276 resets = <&ccu RST_BUS_OHCI>;
282 ccu: clock@1c20000 { label
294 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
437 clocks = <&ccu CLK_BUS_UART0>;
438 resets = <&ccu RST_BUS_UART0>;
450 clocks = <&ccu CLK_BUS_UART1>;
451 resets = <&ccu RST_BUS_UART1>;
463 clocks = <&ccu CLK_BUS_UART2>;
464 resets = <&ccu RST_BUS_UART2>;
476 clocks = <&ccu CLK_BUS_UART3>;
477 resets = <&ccu RST_BUS_UART3>;
489 clocks = <&ccu CLK_BUS_UART4>;
490 resets = <&ccu RST_BUS_UART4>;
500 clocks = <&ccu CLK_BUS_I2C0>;
501 resets = <&ccu RST_BUS_I2C0>;
511 clocks = <&ccu CLK_BUS_I2C1>;
512 resets = <&ccu RST_BUS_I2C1>;
522 clocks = <&ccu CLK_BUS_I2C2>;
523 resets = <&ccu RST_BUS_I2C2>;
547 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
549 resets = <&ccu RST_BUS_GPU>;
552 assigned-clocks = <&ccu CLK_GPU>;