Lines Matching refs:ccu
50 #include <dt-bindings/clock/sun7i-a20-ccu.h>
51 #include <dt-bindings/reset/sun4i-a10-ccu.h>
69 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
70 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
71 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
72 <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
81 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
82 <&ccu CLK_DRAM_DE_BE0>;
90 clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
91 <&ccu CLK_AHB_DE_BE0>,
92 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
93 <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
106 clocks = <&ccu CLK_CPU>;
125 clocks = <&ccu CLK_CPU>;
320 clocks = <&ccu CLK_AHB_DMA>;
328 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
341 clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
356 clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
371 clocks = <&ccu CLK_AHB_EMAC>;
388 resets = <&ccu RST_TCON0>;
390 clocks = <&ccu CLK_AHB_LCD0>,
391 <&ccu CLK_TCON0_CH0>,
392 <&ccu CLK_TCON0_CH1>;
437 resets = <&ccu RST_TCON1>;
439 clocks = <&ccu CLK_AHB_LCD1>,
440 <&ccu CLK_TCON1_CH0>,
441 <&ccu CLK_TCON1_CH1>;
485 clocks = <&ccu CLK_AHB_MMC0>,
486 <&ccu CLK_MMC0>,
487 <&ccu CLK_MMC0_OUTPUT>,
488 <&ccu CLK_MMC0_SAMPLE>;
502 clocks = <&ccu CLK_AHB_MMC1>,
503 <&ccu CLK_MMC1>,
504 <&ccu CLK_MMC1_OUTPUT>,
505 <&ccu CLK_MMC1_SAMPLE>;
519 clocks = <&ccu CLK_AHB_MMC2>,
520 <&ccu CLK_MMC2>,
521 <&ccu CLK_MMC2_OUTPUT>,
522 <&ccu CLK_MMC2_SAMPLE>;
536 clocks = <&ccu CLK_AHB_MMC3>,
537 <&ccu CLK_MMC3>,
538 <&ccu CLK_MMC3_OUTPUT>,
539 <&ccu CLK_MMC3_SAMPLE>;
553 clocks = <&ccu CLK_AHB_OTG>;
568 clocks = <&ccu CLK_USB_PHY>;
570 resets = <&ccu RST_USB_PHY0>,
571 <&ccu RST_USB_PHY1>,
572 <&ccu RST_USB_PHY2>;
581 clocks = <&ccu CLK_AHB_EHCI0>;
591 clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
602 clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
611 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
612 <&ccu CLK_PLL_VIDEO0_2X>,
613 <&ccu CLK_PLL_VIDEO1_2X>;
653 clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
668 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
676 clocks = <&ccu CLK_AHB_EHCI1>;
686 clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
696 clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
707 ccu: clock@1c20000 { label
708 compatible = "allwinner,sun7i-a20-ccu";
720 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
991 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
1001 clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
1010 clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
1022 clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>;
1035 clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
1055 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
1073 clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>;
1094 clocks = <&ccu CLK_APB1_UART0>;
1104 clocks = <&ccu CLK_APB1_UART1>;
1114 clocks = <&ccu CLK_APB1_UART2>;
1124 clocks = <&ccu CLK_APB1_UART3>;
1134 clocks = <&ccu CLK_APB1_UART4>;
1144 clocks = <&ccu CLK_APB1_UART5>;
1154 clocks = <&ccu CLK_APB1_UART6>;
1164 clocks = <&ccu CLK_APB1_UART7>;
1172 clocks = <&ccu CLK_APB1_PS20>;
1180 clocks = <&ccu CLK_APB1_PS21>;
1189 clocks = <&ccu CLK_APB1_I2C0>;
1200 clocks = <&ccu CLK_APB1_I2C1>;
1211 clocks = <&ccu CLK_APB1_I2C2>;
1222 clocks = <&ccu CLK_APB1_I2C3>;
1233 clocks = <&ccu CLK_APB1_CAN>;
1242 clocks = <&ccu CLK_APB1_I2C4>;
1265 clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
1267 resets = <&ccu RST_GPU>;
1269 assigned-clocks = <&ccu CLK_GPU>;
1278 clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
1295 clocks = <&ccu CLK_AHB_HSTIMER>;
1313 clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
1314 <&ccu CLK_DRAM_DE_FE0>;
1317 resets = <&ccu RST_DE_FE0>;
1345 clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
1346 <&ccu CLK_DRAM_DE_FE1>;
1349 resets = <&ccu RST_DE_FE1>;
1377 clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
1378 <&ccu CLK_DRAM_DE_BE1>;
1381 resets = <&ccu RST_DE_BE1>;
1425 clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
1426 <&ccu CLK_DRAM_DE_BE0>;
1429 resets = <&ccu RST_DE_BE0>;