Lines Matching refs:rcc
99 clocks = <&rcc TIM2_K>;
120 clocks = <&rcc TIM3_K>;
141 clocks = <&rcc TIM4_K>;
162 clocks = <&rcc TIM5_K>;
183 clocks = <&rcc TIM6_K>;
199 clocks = <&rcc TIM7_K>;
215 clocks = <&rcc TIM12_K>;
236 clocks = <&rcc TIM13_K>;
257 clocks = <&rcc TIM14_K>;
278 clocks = <&rcc LPTIM1_K>;
306 clocks = <&rcc SPI2_K>;
307 resets = <&rcc SPI2_R>;
320 clocks = <&rcc SPI3_K>;
321 resets = <&rcc SPI3_R>;
332 clocks = <&rcc USART2_K>;
340 clocks = <&rcc USART3_K>;
348 clocks = <&rcc UART4_K>;
356 clocks = <&rcc UART5_K>;
366 clocks = <&rcc I2C1_K>;
367 resets = <&rcc I2C1_R>;
379 clocks = <&rcc I2C2_K>;
380 resets = <&rcc I2C2_R>;
392 clocks = <&rcc I2C3_K>;
393 resets = <&rcc I2C3_R>;
405 clocks = <&rcc I2C5_K>;
406 resets = <&rcc I2C5_R>;
416 clocks = <&rcc CEC_K>, <&clk_lse>;
424 clocks = <&rcc DAC12>;
449 clocks = <&rcc UART7_K>;
457 clocks = <&rcc UART8_K>;
466 clocks = <&rcc TIM1_K>;
487 clocks = <&rcc TIM8_K>;
507 clocks = <&rcc USART6_K>;
517 clocks = <&rcc SPI1_K>;
518 resets = <&rcc SPI1_R>;
531 clocks = <&rcc SPI4_K>;
532 resets = <&rcc SPI4_R>;
544 clocks = <&rcc TIM15_K>;
565 clocks = <&rcc TIM16_K>;
585 clocks = <&rcc TIM17_K>;
607 clocks = <&rcc SPI5_K>;
608 resets = <&rcc SPI5_R>;
618 clocks = <&rcc DFSDM_K>;
692 clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
705 clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
722 clocks = <&rcc DMA1>;
739 clocks = <&rcc DMA2>;
752 clocks = <&rcc DMAMUX>;
760 clocks = <&rcc ADC12>, <&rcc ADC12_K>;
794 clocks = <&rcc USBO_K>;
796 resets = <&rcc USBO_R>;
806 rcc: rcc@50000000 { label
807 compatible = "st,stm32mp1-rcc", "syscon";
830 clocks = <&rcc LPTIM2_K>;
857 clocks = <&rcc LPTIM3_K>;
877 clocks = <&rcc LPTIM4_K>;
891 clocks = <&rcc LPTIM5_K>;
907 clocks = <&rcc VREF>;
915 clocks = <&rcc CRYP1>;
916 resets = <&rcc CRYP1_R>;
924 clocks = <&rcc HASH1>;
925 resets = <&rcc HASH1_R>;
935 clocks = <&rcc RNG1_K>;
936 resets = <&rcc RNG1_R>;
944 clocks = <&rcc MDMA>;
955 clocks = <&rcc QSPI_K>;
956 resets = <&rcc QSPI_R>;
963 clocks = <&rcc CRC1>;
984 clocks = <&rcc ETHMAC>,
985 <&rcc ETHTX>,
986 <&rcc ETHRX>,
987 <&rcc ETHSTP>,
988 <&rcc SYSCFG>;
1000 clocks = <&rcc USBH>;
1001 resets = <&rcc USBH_R>;
1009 clocks = <&rcc USBH>;
1010 resets = <&rcc USBH_R>;
1019 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
1021 resets = <&rcc DSI_R>;
1031 clocks = <&rcc LTDC_PX>;
1033 resets = <&rcc LTDC_R>;
1040 clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
1050 clocks = <&rcc USBPHY_K>;
1051 resets = <&rcc USBPHY_R>;
1069 clocks = <&rcc USART1_K>;
1079 clocks = <&rcc SPI6_K>;
1080 resets = <&rcc SPI6_R>;
1093 clocks = <&rcc I2C4_K>;
1094 resets = <&rcc I2C4_R>;
1103 clocks = <&rcc RTCAPB>, <&rcc RTC>;
1115 clocks = <&rcc I2C6_K>;
1116 resets = <&rcc I2C6_R>;