Lines Matching refs:rcc
46 #include <dt-bindings/mfd/stm32h7-rcc.h>
75 clocks = <&rcc TIM5_CK>;
83 clocks = <&rcc LPTIM1_CK>;
111 clocks = <&rcc SPI2_CK>;
122 clocks = <&rcc SPI3_CK>;
131 clocks = <&rcc USART2_CK>;
141 resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
142 clocks = <&rcc I2C1_CK>;
153 resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
154 clocks = <&rcc I2C2_CK>;
165 resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
166 clocks = <&rcc I2C3_CK>;
173 clocks = <&rcc DAC12_CK>;
199 clocks = <&rcc USART1_CK>;
208 clocks = <&rcc SPI1_CK>;
218 clocks = <&rcc SPI4_CK>;
228 clocks = <&rcc SPI5_CK>;
243 clocks = <&rcc DMA1_CK>;
261 clocks = <&rcc DMA2_CK>;
275 clocks = <&rcc DMA1_CK>;
282 clocks = <&rcc ADC12_CK>;
313 clocks = <&rcc USB1OTG_CK>;
325 clocks = <&rcc USB2OTG_CK>;
334 clocks = <&rcc MDMA_CK>;
359 clocks = <&rcc SPI6_CK>;
370 resets = <&rcc STM32H7_APB4_RESET(I2C4)>;
371 clocks = <&rcc I2C4_CK>;
380 clocks = <&rcc LPTIM2_CK>;
407 clocks = <&rcc LPTIM3_CK>;
429 clocks = <&rcc LPTIM4_CK>;
445 clocks = <&rcc LPTIM5_CK>;
459 clocks = <&rcc VREF_CK>;
468 clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
470 assigned-clocks = <&rcc RTC_CK>;
471 assigned-clock-parents = <&rcc LSE_CK>;
479 rcc: reset-clock-controller@58024400 { label
480 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
497 clocks = <&rcc ADC3_CK>;