Lines Matching refs:rcc
46 #include <dt-bindings/mfd/stm32f7-rcc.h>
80 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
89 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
109 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
118 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
138 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
147 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
167 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
175 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
195 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
204 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
219 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
228 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
244 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
265 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
280 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
293 clocks = <&rcc 1 CLK_RTC>;
295 assigned-clocks = <&rcc 1 CLK_RTC>;
296 assigned-clock-parents = <&rcc 1 CLK_LSE>;
308 clocks = <&rcc 1 CLK_USART2>;
316 clocks = <&rcc 1 CLK_USART3>;
324 clocks = <&rcc 1 CLK_UART4>;
332 clocks = <&rcc 1 CLK_UART5>;
341 resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
342 clocks = <&rcc 1 CLK_I2C1>;
353 resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
354 clocks = <&rcc 1 CLK_I2C2>;
365 resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
366 clocks = <&rcc 1 CLK_I2C3>;
377 resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
378 clocks = <&rcc 1 CLK_I2C4>;
388 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
397 clocks = <&rcc 1 CLK_UART7>;
405 clocks = <&rcc 1 CLK_UART8>;
414 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
435 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
455 clocks = <&rcc 1 CLK_USART1>;
463 clocks = <&rcc 1 CLK_USART6>;
471 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
482 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
507 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
528 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
543 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
561 clocks = <&rcc 0 12>;
565 rcc: rcc@40023800 { label
568 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
572 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
587 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
603 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
613 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
625 clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
633 clocks = <&rcc 1 0>;