Lines Matching refs:pericfg
224 pericfg: syscon@10003000 { label
225 compatible = "mediatek,mt7623-pericfg",
226 "mediatek,mt2701-pericfg",
352 clocks = <&pericfg CLK_PERI_AUXADC>;
362 clocks = <&pericfg CLK_PERI_UART0_SEL>,
363 <&pericfg CLK_PERI_UART0>;
373 clocks = <&pericfg CLK_PERI_UART1_SEL>,
374 <&pericfg CLK_PERI_UART1>;
384 clocks = <&pericfg CLK_PERI_UART2_SEL>,
385 <&pericfg CLK_PERI_UART2>;
395 clocks = <&pericfg CLK_PERI_UART3_SEL>,
396 <&pericfg CLK_PERI_UART3>;
406 <&pericfg CLK_PERI_PWM>,
407 <&pericfg CLK_PERI_PWM1>,
408 <&pericfg CLK_PERI_PWM2>,
409 <&pericfg CLK_PERI_PWM3>,
410 <&pericfg CLK_PERI_PWM4>,
411 <&pericfg CLK_PERI_PWM5>;
424 clocks = <&pericfg CLK_PERI_I2C0>,
425 <&pericfg CLK_PERI_AP_DMA>;
439 clocks = <&pericfg CLK_PERI_I2C1>,
440 <&pericfg CLK_PERI_AP_DMA>;
454 clocks = <&pericfg CLK_PERI_I2C2>,
455 <&pericfg CLK_PERI_AP_DMA>;
471 <&pericfg CLK_PERI_SPI0>;
482 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
484 resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
497 clocks = <&pericfg CLK_PERI_BTIF>;
510 clocks = <&pericfg CLK_PERI_NFI>,
511 <&pericfg CLK_PERI_NFI_PAD>;
524 clocks = <&pericfg CLK_PERI_NFI_ECC>;
533 clocks = <&pericfg CLK_PERI_FLASH>,
550 <&pericfg CLK_PERI_SPI1>;
564 <&pericfg CLK_PERI_SPI2>;
669 clocks = <&pericfg CLK_PERI_MSDC30_0>,
680 clocks = <&pericfg CLK_PERI_MSDC30_1>,