Lines Matching refs:PIN_OUTPUT
183 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
184 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
192 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
193 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
194 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
195 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
227 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
234 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
281 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
282 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
283 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
284 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
285 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
286 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
295 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
296 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
297 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
298 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
299 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
300 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
346 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
360 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
361 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
362 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
363 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
364 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
365 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
366 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
367 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
368 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
369 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
370 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
371 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
372 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
373 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
374 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
375 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
376 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
377 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
378 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
379 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
380 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
381 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
382 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
383 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
384 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
385 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
386 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
387 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
394 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
395 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
429 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
435 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */