Lines Matching refs:AM33XX_IOPAD
26 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
27 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
28 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
29 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
30 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
31 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
32 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
33 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
34 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
35 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
36 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
37 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
44 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
45 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
46 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
47 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
48 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
49 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
50 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
51 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
52 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
53 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
54 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
55 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
62 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
63 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
70 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
71 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
77 AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLUP | MUX_MODE7) /* rmii1_refclk.gpio0_29 */
83 AM33XX_IOPAD(0x968, PIN_INPUT | MUX_MODE7) /* uart0_ctsn.gpio1_8 */
89 AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7) /* gpmc_a10.gpio1_26 */