Lines Matching refs:PIN_INPUT_PULLDOWN
177 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
178 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
179 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
185 AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
186 AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
256 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
262 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
263 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
264 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
265 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
266 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
273 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
274 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
275 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
276 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
277 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
278 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
279 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
280 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
281 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
282 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
283 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
284 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
299 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
300 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
372 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
374 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
380 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
381 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
382 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
383 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
390 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */