Lines Matching refs:deadlock
977 bool "ARM errata: Processor deadlock when a false hazard is created"
985 hazard might then cause a processor deadlock. The workaround enables
1128 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1134 to deadlock. This workaround puts DSB before executing ISB if
1157 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption"
1162 instruction might deadlock. Fixed in r0p1.
1164 lead to either a data corruption or a CPU deadlock. Not fixed in
1178 deadlock when the VMOV instructions are issued out-of-order.
1181 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock"
1187 and Device/Strongly-Ordered loads and stores might cause deadlock
1199 bool "ARM errata: A17: some seqs of opposed cond code instrs => deadlock or corruption"
1204 lead to either a data corruption or a CPU deadlock. Not fixed in