34 void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr,
239 void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr,  in __cache_line_loop_v2()  argument
259 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v2()
260 		paddr &= CACHE_LINE_MASK;  in __cache_line_loop_v2()
267 	paddr |= (vaddr >> PAGE_SHIFT) & 0x1F;  in __cache_line_loop_v2()
270 		write_aux_reg(aux_cmd, paddr);  in __cache_line_loop_v2()
271 		paddr += L1_CACHE_BYTES;  in __cache_line_loop_v2()
284 void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr,  in __cache_line_loop_v3()  argument
305 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v3()
306 		paddr &= CACHE_LINE_MASK;  in __cache_line_loop_v3()
316 		write_aux_reg(aux_tag, paddr);  in __cache_line_loop_v3()
326 		write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32);  in __cache_line_loop_v3()
330 			write_aux_reg(aux_tag, paddr);  in __cache_line_loop_v3()
331 			paddr += L1_CACHE_BYTES;  in __cache_line_loop_v3()
355 void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr,  in __cache_line_loop_v4()  argument
375 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v4()
376 		paddr &= CACHE_LINE_MASK;  in __cache_line_loop_v4()
392 			write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32);  in __cache_line_loop_v4()
394 			write_aux_reg(ARC_REG_DC_PTAG_HI, (u64)paddr >> 32);  in __cache_line_loop_v4()
398 		write_aux_reg(aux_cmd, paddr);  in __cache_line_loop_v4()
399 		paddr += L1_CACHE_BYTES;  in __cache_line_loop_v4()
409 void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr,  in __cache_line_loop_v4()  argument
425 		sz += paddr & ~CACHE_LINE_MASK;  in __cache_line_loop_v4()
426 		paddr &= CACHE_LINE_MASK;  in __cache_line_loop_v4()
438 			write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32);  in __cache_line_loop_v4()
440 			write_aux_reg(ARC_REG_DC_PTAG_HI, (u64)paddr >> 32);  in __cache_line_loop_v4()
444 	write_aux_reg(e, paddr + sz);	/* ENDR is exclusive */  in __cache_line_loop_v4()
445 	write_aux_reg(s, paddr);  in __cache_line_loop_v4()
569 static inline void __dc_line_op(phys_addr_t paddr, unsigned long vaddr,  in __dc_line_op()  argument
579 	__cache_line_loop(paddr, vaddr, sz, op, full_page);  in __dc_line_op()
591 #define __dc_line_op(paddr, vaddr, sz, op)  argument
592 #define __dc_line_op_k(paddr, sz, op)  argument
605 __ic_line_inv_vaddr_local(phys_addr_t paddr, unsigned long vaddr,  in __ic_line_inv_vaddr_local()  argument
612 	(*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC, full_page);  in __ic_line_inv_vaddr_local()
623 	phys_addr_t paddr, vaddr;  member
631         __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);  in __ic_line_inv_vaddr_helper()
634 static void __ic_line_inv_vaddr(phys_addr_t paddr, unsigned long vaddr,  in __ic_line_inv_vaddr()  argument
638 		.paddr = paddr,  in __ic_line_inv_vaddr()
655 noinline void slc_op_rgn(phys_addr_t paddr, unsigned long sz, const int op)  in slc_op_rgn()  argument
698 	end = paddr + sz + l2_line_sz - 1;  in slc_op_rgn()
705 		write_aux_reg(ARC_REG_SLC_RGN_START1, upper_32_bits(paddr));  in slc_op_rgn()
707 	write_aux_reg(ARC_REG_SLC_RGN_START, lower_32_bits(paddr));  in slc_op_rgn()
718 noinline void slc_op_line(phys_addr_t paddr, unsigned long sz, const int op)  in slc_op_line()  argument
749 	sz += paddr & ~SLC_LINE_MASK;  in slc_op_line()
750 	paddr &= SLC_LINE_MASK;  in slc_op_line()
755 		write_aux_reg(cmd, paddr);  in slc_op_line()
756 		paddr += l2_line_sz;  in slc_op_line()
768 #define slc_op(paddr, sz, op)	slc_op_rgn(paddr, sz, op)  argument
849 		phys_addr_t paddr = (unsigned long)page_address(page);  in flush_dcache_page()  local
852 		if (addr_not_cache_congruent(paddr, vaddr))  in flush_dcache_page()
853 			__flush_dcache_page(paddr, vaddr);  in flush_dcache_page()
988 void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len)  in __sync_icache_dcache()  argument
990 	__dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);  in __sync_icache_dcache()
991 	__ic_line_inv_vaddr(paddr, vaddr, len);  in __sync_icache_dcache()
995 void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr)  in __inv_icache_page()  argument
997 	__ic_line_inv_vaddr(paddr, vaddr, PAGE_SIZE);  in __inv_icache_page()
1004 void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr)  in __flush_dcache_page()  argument
1006 	__dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV);  in __flush_dcache_page()
1032 	phys_addr_t paddr = pfn << PAGE_SHIFT;  in flush_cache_page()  local
1036 	__flush_dcache_page(paddr, u_vaddr);  in flush_cache_page()
1039 		__inv_icache_page(paddr, u_vaddr);  in flush_cache_page()