Lines Matching refs:cpu
71 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu) in read_decode_ccm_bcr() argument
79 cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */ in read_decode_ccm_bcr()
80 cpu->iccm.base_addr = iccm.base << 16; in read_decode_ccm_bcr()
86 cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */ in read_decode_ccm_bcr()
89 cpu->dccm.base_addr = base & ~0xF; in read_decode_ccm_bcr()
98 cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */ in read_decode_ccm_bcr()
100 cpu->iccm.sz <<= iccm.sz01; in read_decode_ccm_bcr()
103 cpu->iccm.base_addr = region & 0xF0000000; in read_decode_ccm_bcr()
108 cpu->dccm.sz = 256 << dccm.sz0; in read_decode_ccm_bcr()
110 cpu->dccm.sz <<= dccm.sz1; in read_decode_ccm_bcr()
113 cpu->dccm.base_addr = region & 0xF0000000; in read_decode_ccm_bcr()
122 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; in read_arc_build_cfg_regs() local
126 FIX_PTR(cpu); in read_arc_build_cfg_regs()
128 READ_BCR(AUX_IDENTITY, cpu->core); in read_arc_build_cfg_regs()
131 if (cpu->core.family == tbl->id) { in read_arc_build_cfg_regs()
132 cpu->details = tbl->str; in read_arc_build_cfg_regs()
138 if ((cpu->core.family & 0xF4) == tbl->id) in read_arc_build_cfg_regs()
141 cpu->name = tbl->str; in read_arc_build_cfg_regs()
144 cpu->extn.timer0 = timer.t0; in read_arc_build_cfg_regs()
145 cpu->extn.timer1 = timer.t1; in read_arc_build_cfg_regs()
146 cpu->extn.rtc = timer.rtc; in read_arc_build_cfg_regs()
148 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); in read_arc_build_cfg_regs()
150 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy); in read_arc_build_cfg_regs()
152 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */ in read_arc_build_cfg_regs()
153 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */ in read_arc_build_cfg_regs()
154 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */ in read_arc_build_cfg_regs()
155 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0; in read_arc_build_cfg_regs()
156 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */ in read_arc_build_cfg_regs()
157 cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 : in read_arc_build_cfg_regs()
160 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); in read_arc_build_cfg_regs()
163 read_decode_ccm_bcr(cpu); in read_arc_build_cfg_regs()
174 cpu->extn.fpu_sp = sp.ver ? 1 : 0; in read_arc_build_cfg_regs()
175 cpu->extn.fpu_dp = dp.ver ? 1 : 0; in read_arc_build_cfg_regs()
178 cpu->bpu.ver = bpu.ver; in read_arc_build_cfg_regs()
179 cpu->bpu.full = bpu.fam ? 1 : 0; in read_arc_build_cfg_regs()
181 cpu->bpu.num_cache = 256 << (bpu.ent - 1); in read_arc_build_cfg_regs()
182 cpu->bpu.num_pred = 256 << (bpu.ent - 1); in read_arc_build_cfg_regs()
189 cpu->extn.fpu_sp = spdp.sp ? 1 : 0; in read_arc_build_cfg_regs()
190 cpu->extn.fpu_dp = spdp.dp ? 1 : 0; in read_arc_build_cfg_regs()
193 cpu->bpu.ver = bpu.ver; in read_arc_build_cfg_regs()
194 cpu->bpu.full = bpu.ft; in read_arc_build_cfg_regs()
195 cpu->bpu.num_cache = 256 << bpu.bce; in read_arc_build_cfg_regs()
196 cpu->bpu.num_pred = 2048 << bpu.pte; in read_arc_build_cfg_regs()
198 if (cpu->core.family >= 0x54) { in read_arc_build_cfg_regs()
202 cpu->extn.dual_enb = !(exec_ctrl & 1); in read_arc_build_cfg_regs()
205 cpu->extn.dual = 1; in read_arc_build_cfg_regs()
210 cpu->extn.ap = bcr.ver ? 1 : 0; in read_arc_build_cfg_regs()
213 cpu->extn.smart = bcr.ver ? 1 : 0; in read_arc_build_cfg_regs()
216 cpu->extn.rtt = bcr.ver ? 1 : 0; in read_arc_build_cfg_regs()
218 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt; in read_arc_build_cfg_regs()
225 cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC); in read_arc_build_cfg_regs()
229 cpu->isa.atomic = bcr.info & 1; in read_arc_build_cfg_regs()
232 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); in read_arc_build_cfg_regs()
235 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3)) in read_arc_build_cfg_regs()
236 cpu->name = "ARC750"; in read_arc_build_cfg_regs()
238 cpu->isa = isa; in read_arc_build_cfg_regs()
244 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; in arc_cpu_mumbojumbo() local
245 struct bcr_identity *core = &cpu->core; in arc_cpu_mumbojumbo()
248 FIX_PTR(cpu); in arc_cpu_mumbojumbo()
255 cpu_id, cpu->name, cpu->details, in arc_cpu_mumbojumbo()
257 IS_AVAIL1(cpu->isa.be, "[Big-Endian]"), in arc_cpu_mumbojumbo()
258 IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue ")); in arc_cpu_mumbojumbo()
261 IS_AVAIL1(cpu->extn.timer0, "Timer0 "), in arc_cpu_mumbojumbo()
262 IS_AVAIL1(cpu->extn.timer1, "Timer1 "), in arc_cpu_mumbojumbo()
263 IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT), in arc_cpu_mumbojumbo()
264 IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT)); in arc_cpu_mumbojumbo()
267 IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC), in arc_cpu_mumbojumbo()
268 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64), in arc_cpu_mumbojumbo()
269 IS_AVAIL1(cpu->isa.unalign, "unalign (not used)")); in arc_cpu_mumbojumbo()
274 if (cpu->extn_mpy.ver) { in arc_cpu_mumbojumbo()
275 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */ in arc_cpu_mumbojumbo()
280 if (cpu->extn_mpy.dsp) /* OPT 7-9 */ in arc_cpu_mumbojumbo()
281 opt = cpu->extn_mpy.dsp + 6; in arc_cpu_mumbojumbo()
288 IS_AVAIL1(cpu->isa.div_rem, "div_rem "), in arc_cpu_mumbojumbo()
289 IS_AVAIL1(cpu->extn.norm, "norm "), in arc_cpu_mumbojumbo()
290 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "), in arc_cpu_mumbojumbo()
291 IS_AVAIL1(cpu->extn.swap, "swap "), in arc_cpu_mumbojumbo()
292 IS_AVAIL1(cpu->extn.minmax, "minmax "), in arc_cpu_mumbojumbo()
293 IS_AVAIL1(cpu->extn.crc, "crc "), in arc_cpu_mumbojumbo()
294 IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE)); in arc_cpu_mumbojumbo()
296 if (cpu->bpu.ver) in arc_cpu_mumbojumbo()
299 IS_AVAIL1(cpu->bpu.full, "full"), in arc_cpu_mumbojumbo()
300 IS_AVAIL1(!cpu->bpu.full, "partial"), in arc_cpu_mumbojumbo()
301 cpu->bpu.num_cache, cpu->bpu.num_pred); in arc_cpu_mumbojumbo()
324 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; in arc_extn_mumbojumbo() local
326 FIX_PTR(cpu); in arc_extn_mumbojumbo()
328 n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base); in arc_extn_mumbojumbo()
330 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp) in arc_extn_mumbojumbo()
332 IS_AVAIL1(cpu->extn.fpu_sp, "SP "), in arc_extn_mumbojumbo()
333 IS_AVAIL1(cpu->extn.fpu_dp, "DP ")); in arc_extn_mumbojumbo()
335 if (cpu->extn.debug) in arc_extn_mumbojumbo()
337 IS_AVAIL1(cpu->extn.ap, "ActionPoint "), in arc_extn_mumbojumbo()
338 IS_AVAIL1(cpu->extn.smart, "smaRT "), in arc_extn_mumbojumbo()
339 IS_AVAIL1(cpu->extn.rtt, "RTT ")); in arc_extn_mumbojumbo()
341 if (cpu->dccm.sz || cpu->iccm.sz) in arc_extn_mumbojumbo()
343 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz), in arc_extn_mumbojumbo()
344 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); in arc_extn_mumbojumbo()
374 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; in arc_chk_core_config() local
378 if (!cpu->extn.timer0) in arc_chk_core_config()
381 if (!cpu->extn.timer1) in arc_chk_core_config()
389 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr) in arc_chk_core_config()
392 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz) in arc_chk_core_config()
397 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) in arc_chk_core_config()
412 present = cpu->extn.fpu_dp; in arc_chk_core_config()
418 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp; in arc_chk_core_config()
627 static DEFINE_PER_CPU(struct cpu, cpu_topology);
631 int cpu; in topology_init() local
633 for_each_present_cpu(cpu) in topology_init()
634 register_cpu(&per_cpu(cpu_topology, cpu), cpu); in topology_init()