Lines Matching refs:with
29 - interrupts : Interrupt list, with the first #global-irqs entries
43 SMMUs with stream matching support and complex masters
45 IOMMU specifier represents an SMR mask to combine with
52 cache coherent with the CPU.
71 or using stream matching with #iommu-cells = <2>, and
82 arguments associated with its phandle.
86 /* SMMU with stream matching or stream indexing */
100 /* device with two stream IDs, 0 and 7 */
107 /* SMMU with stream matching */
113 /* device with stream IDs 0 and 7 */
119 /* device with stream IDs 1, 17, 33 and 49 */
125 /* ARM MMU-500 with 10-bit stream ID input configuration */