Lines Matching refs:PRR
39 Partial Reconfiguration Region (PRR)
41 * A PRR is a specific section of a FPGA reserved for reconfiguration.
42 * A base (or static) FPGA image may create a set of PRR's that later may
44 * The size and specific location of each PRR is fixed.
45 * The connections at the edge of each PRR are fixed. The image that is loaded
46 into a PRR must fit and must use a subset of the region's connections.
52 * An FPGA image that is designed to be loaded into a PRR. There may be
53 any number of personas designed to fit into a PRR, but only one at at time
101 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be
152 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows
303 In this case, the FPGA will have one or more PRR's that may be programmed
308 PRR's with FPGA bridges. The device tree should have a FPGA region for each
309 PRR.
396 Device Tree Example: Full Reconfiguration to add PRR's
447 This example reprograms one of the PRR's set up in the previous example.