Lines Matching refs:sysc
1 Texas Instruments sysc interconnect target module wrapper binding
5 interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
22 "ti,sysc"
23 "ti,sysc-omap2"
24 "ti,sysc-omap4"
25 "ti,sysc-omap4-simple"
30 "ti,sysc-omap2-timer"
31 "ti,sysc-omap4-timer"
32 "ti,sysc-omap3430-sr"
33 "ti,sysc-omap3630-sr"
34 "ti,sysc-omap4-sr"
35 "ti,sysc-omap3-sham"
36 "ti,sysc-omap-aes"
37 "ti,sysc-mcasp"
38 "ti,sysc-usb-host-fs"
39 "ti,sysc-dra7-mcan"
42 target module in question such as revision, sysc and syss
46 "rev, "sysc", and "syss"
56 - ti,sysc-mask shall contain mask of supported register bits for the
60 - ti,sysc-midle list of master idle modes supported by the interconnect
64 - ti,sysc-sidle list of slave idle modes supported by the interconnect
68 - ti,sysc-delay-us delay needed after OCP softreset before accssing
100 compatible = "ti,sysc-omap2";
105 reg-names = "rev", "sysc", "syss";
108 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
111 ti,sysc-midle = <SYSC_IDLE_FORCE>,
114 ti,sysc-sidle = <SYSC_IDLE_FORCE>,