Name Date Size #Lines LOC

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chip_specific_extensions/H06-Mar-2024-34394

Documentation.urlHD06-Mar-2024139 65

port.cHD06-Mar-20249.7 KiB20495

portASM.SHD06-Mar-202417.6 KiB385202

portContext.hHD06-Mar-20247.5 KiB193127

portmacro.hHD06-Mar-20247.9 KiB19691

readme.txtHD06-Mar-20241.2 KiB2423

readme.txt

1/*
2 * The FreeRTOS kernel's RISC-V port is split between the the code that is
3 * common across all currently supported RISC-V chips (implementations of the
4 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
5 *
6 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
7 *   is common to all currently supported RISC-V chips.  There is only one
8 *   portASM.S file because the same file is built for all RISC-V target chips.
9 *
10 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
11 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
12 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
13 *   as there are multiple RISC-V chip implementations.
14 *
15 * !!!NOTE!!!
16 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
17 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
18 * compiler's!) include path.  For example, if the chip in use includes a core
19 * local interrupter (CLINT) and does not include any chip specific register
20 * extensions then add the path below to the assembler's include path:
21 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
22 *
23 */
24