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Searched refs:portSCB_SYS_HANDLER_CTRL_STATE_REG (Results 1 – 22 of 22) sorted by relevance

/Kernel-v11.1.0/portable/IAR/ARM_CM35P_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM33_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM35P/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM23/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM33/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM55_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM55_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM55/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM85_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM85/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM23_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM35P_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/ARMv8M/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM23/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM23_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM85_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM55/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/IAR/ARM_CM85/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM33/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM33_NTZ/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM35P/non_secure/
Dport.c111 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro
936 portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT; in prvSetupMPU()
/Kernel-v11.1.0/portable/GCC/ARM_CM0/
Dport.c80 #define portSCB_SYS_HANDLER_CTRL_STATE_REG ( *( ( volatile uint32_t * ) 0xe000ed24 ) ) macro