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/Kernel-v10.6.2/.github/workflows/
HDci.yml9 spell-check:
10 runs-on: ubuntu-latest
12 - name: Checkout Parent Repo
16 repository: aws/aws-iot-device-sdk-embedded-C
18 - name: Clone This Repo
22 - name: Install spell
24 sudo apt-get install spell
25 sudo apt-get install util-linux
26 - name: Check spelling
30 …sed -i 's/find $DIRNAME/find $DIRNAME -not -path '*portable*'/g' main/tools/spell/find-unknown-com…
[all …]
HDgit-secrets.yml1 name: git-secrets Check
7 git-secrets:
8 runs-on: ubuntu-latest
10 - uses: actions/checkout@v2
13 - name: Checkout awslabs/git-secrets
16 repository: awslabs/git-secrets
18 path: git-secrets
19 - name: Install git-secrets
20 run: cd git-secrets && sudo make install && cd ..
21 - name: Run git-secrets
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HDkernel-checks.yml1 name: Kernel-Checker
6 kernel-checker:
8 runs-on: ubuntu-20.04
11 - name: Tool Setup
12 uses: actions/setup-python@v2
14 python-version: 3.7.10
20 - name: Checkout FreeRTOS Tools
28 - name: Checkout Pull Request
34 - name: Collecting changed files
35 uses: lots0logs/gh-action-get-changed-files@2.1.4
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/Kernel-v10.6.2/portable/MemMang/
HDheap_1.c5 * SPDX-License-Identifier: MIT
54 #define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
60 * heap - probably so it can be placed in a special segment or address. */
69 /*-----------------------------------------------------------*/
81 /* Byte alignment required. Check for overflow. */ in pvPortMalloc()
82 …if( ( xWantedSize + ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ) ) > xWanted… in pvPortMalloc()
84 xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); in pvPortMalloc()
99 … = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT - 1 ] ) & ( ~( ( portP… in pvPortMalloc()
102 /* Check there is enough room left for the allocation and. */ in pvPortMalloc()
105 ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */ in pvPortMalloc()
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HDheap_5.c5 * SPDX-License-Identifier: MIT
31 * across multiple non-contigous blocks and combines (coalescences) adjacent
101 /* Check if multiplying a and b will result in overflow. */
104 /* Check if adding a and b will result in overflow. */
105 #define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) )
111 …BLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) )
113 #define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_…
114 #define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_B…
115 #define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_…
117 /*-----------------------------------------------------------*/
[all …]
HDheap_2.c5 * SPDX-License-Identifier: MIT
60 #define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
68 /* Check if multiplying a and b will result in overflow. */
71 /* Check if adding a and b will result in overflow. */
72 #define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) )
78 …BLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) )
80 #define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_…
81 #define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_B…
82 #define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_…
84 /*-----------------------------------------------------------*/
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HDheap_4.c5 * SPDX-License-Identifier: MIT
67 /* Check if multiplying a and b will result in overflow. */
70 /* Check if adding a and b will result in overflow. */
71 #define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) )
77 …BLOCK_ALLOCATED_BITMASK ( ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ) )
79 #define heapBLOCK_IS_ALLOCATED( pxBlock ) ( ( ( pxBlock->xBlockSize ) & heapBLOCK_ALLOCATED_…
80 #define heapALLOCATE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) |= heapBLOCK_ALLOCATED_B…
81 #define heapFREE_BLOCK( pxBlock ) ( ( pxBlock->xBlockSize ) &= ~heapBLOCK_ALLOCATED_…
83 /*-----------------------------------------------------------*/
89 * heap - probably so it can be placed in a special segment or address. */
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/Kernel-v10.6.2/portable/ThirdParty/GCC/RP2040/
HDFreeRTOS_Kernel_import.cmake18 # check if we are inside the FreeRTOS kernel tree (i.e. this file has been included directly)
26 …FREERTOS_KERNEL_PATH to ${FREERTOS_KERNEL_PATH} based on location of FreeRTOS-Kernel-import.cmake")
27 elseif (PICO_SDK_PATH AND EXISTS "${PICO_SDK_PATH}/../FreeRTOS-Kernel")
28 set(FREERTOS_KERNEL_PATH ${PICO_SDK_PATH}/../FreeRTOS-Kernel)
34 foreach(POSSIBLE_SUFFIX Source FreeRTOS-Kernel FreeRTOS/Source)
35 # check if FreeRTOS-Kernel exists under directory that included us
/Kernel-v10.6.2/portable/GCC/IA32_flat/
HDport.c5 * SPDX-License-Identifier: MIT
37 /* Check the configuration. */
79 /* The expected size of each entry in the IDT. Used to check structure packing
90 to allow for a crude stack overflow check. */
92 /*-----------------------------------------------------------*/
130 * Check an interrupt vector is not too high, too low, in use by FreeRTOS, or
135 /*-----------------------------------------------------------*/
190 …pOfSystemStack __attribute__((used)) = ( uint32_t ) &( ulSystemStack[ configISR_STACK_SIZE - 5 ] );
202 /*-----------------------------------------------------------*/
214 pxTopOfStack--; in pxPortInitialiseStack()
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/Kernel-v10.6.2/
HDevent_groups.c5 * SPDX-License-Identifier: MIT
63 /*-----------------------------------------------------------*/
77 /*-----------------------------------------------------------*/
90 /* Sanity check that the size of the structure used to declare a in xEventGroupCreateStatic()
98 /* The user has provided a statically allocated event group - use it. */ in xEventGroupCreateStatic()
99 …ing purposes and guaranteed to have the same size and alignment requirement - checked by configASS… in xEventGroupCreateStatic()
103 pxEventBits->uxEventBits = 0; in xEventGroupCreateStatic()
104 vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); in xEventGroupCreateStatic()
111 pxEventBits->ucStaticallyAllocated = pdTRUE; in xEventGroupCreateStatic()
120 * pxEventGroupBuffer pointing to a pre-allocated (compile time in xEventGroupCreateStatic()
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HDqueue.c5 * SPDX-License-Identifier: MIT
53 #define queueUNLOCKED ( ( int8_t ) -1 )
98 * rationale: https://www.FreeRTOS.org/Embedded-RTOS-Queues.html
139 /*-----------------------------------------------------------*/
239 * disinherit the priority - but only down to the highest priority of any
245 /*-----------------------------------------------------------*/
254 if( ( pxQueue )->cRxLock == queueUNLOCKED ) \
256 ( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED; \
258 if( ( pxQueue )->cTxLock == queueUNLOCKED ) \
260 ( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED; \
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HDcroutine.c5 * SPDX-License-Identifier: MIT
33 /* Remove the whole file is co-routines are not being used. */
45 /* Lists for ready and blocked co-routines. --------------------*/
46 …t_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */
47 …static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */
48 …outineList2; /*< Delayed co-routines (two lists are used - one f…
49 …dCoRoutineList = NULL; /*< Points to the delayed co-routine list currentl…
50 …= NULL; /*< Points to the delayed co-routine list currently being used to hold co
51 …static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that…
53 /* Other file private variables. --------------------------------*/
[all …]
/Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/
HDxtensa_loadstore_handler.S2 * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
4 * SPDX-License-Identifier: Apache-2.0
17 * -------------------
22 * -----------------------------
23 * L8UI xxxx xxxx 0000 ssss tttt 0010 <- LoadStoreError
24 …* L16UI xxxx xxxx 0001 ssss tttt 0010 <- LoadStoreError, LoadStoreAlignme…
25 …* L16SI xxxx xxxx 1001 ssss tttt 0010 <- LoadStoreError, LoadStoreAlignme…
26 * L32I xxxx xxxx 0010 ssss tttt 0010 <- LoadStoreAlignment
28 * S8I xxxx xxxx 0100 ssss tttt 0010 <- LoadStoreError
29 …* S16I xxxx xxxx 0101 ssss tttt 0010 <- LoadStoreError, LoadStoreAlignme…
[all …]
HDport_common.c2 * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
4 * SPDX-License-Identifier: Apache-2.0
17 #include "esp_private/startup_internal.h" /* Required by g_spiram_ok. [refactor-todo] for g_spir…
31 // SPIRAM is not supported on ESP32-C3
38 /* Architecture-agnostic parts of the FreeRTOS ESP-IDF port layer can go here.
51 // And since this should be true, we can just check for CONFIG_FREERTOS_UNICORE.
105 // [refactor-todo] check if there is a way to move the following block to esp_system startup in main_task()
145 // -------------------- Heap Related -----------------------
/Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/include/
HDportmacro.h2 * SPDX-FileCopyrightText: 2017 Amazon.com, Inc. or its affiliates
3 * SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc.
5 * SPDX-License-Identifier: MIT
7 * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
38 * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
63 /* *INDENT-OFF* */
67 /* *INDENT-ON* */
98 /*-----------------------------------------------------------
105 *-----------------------------------------------------------
131 /*-----------------------------------------------------------*/
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/Kernel-v10.6.2/portable/GCC/AVR32_UC3/
HDportmacro.h5 * SPDX-License-Identifier: MIT AND BSD-3-Clause
34 * - Compiler: GNU GCC for AVR32
35 * - Supported devices: All AVR32 devices can be used.
36 * - AppNote:
75 /*-----------------------------------------------------------
82 *-----------------------------------------------------------
88 /* *INDENT-OFF* */
92 /* *INDENT-ON* */
123 /*-----------------------------------------------------------*/
126 #define portSTACK_GROWTH ( -1 )
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/Kernel-v10.6.2/portable/IAR/AVR32_UC3/
HDportmacro.h5 * SPDX-License-Identifier: MIT AND BSD-3-Clause
34 * - Compiler: IAR EWAVR32
35 * - Supported devices: All AVR32 devices can be used.
36 * - AppNote:
77 /*-----------------------------------------------------------
84 *-----------------------------------------------------------
90 /* *INDENT-OFF* */
94 /* *INDENT-ON* */
126 /*-----------------------------------------------------------*/
129 #define portSTACK_GROWTH ( -1 )
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/Kernel-v10.6.2/portable/MPLAB/PIC32MX/
HDportmacro.h5 * SPDX-License-Identifier: MIT
35 /* *INDENT-OFF* */
39 /* *INDENT-ON* */
41 /*-----------------------------------------------------------
48 *-----------------------------------------------------------
71 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
77 /*-----------------------------------------------------------*/
81 #define portSTACK_GROWTH -1
83 /*-----------------------------------------------------------*/
91 configMAX_SYSCALL_INTERRUPT_PRIORITY. An extra check is performed if
[all …]
/Kernel-v10.6.2/portable/GCC/ARM_CM7/
HDReadMe.txt1 There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers.
2 The best option depends on the revision of the ARM Cortex-M7 core in use. The
4 like 'r0p1'. Check the documentation for the microcontroller in use to find the
5 revision of the Cortex-M7 core used in that microcontroller. If in doubt, use
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
12 If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
16 If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1
/Kernel-v10.6.2/portable/IAR/ARM_CM7/
HDReadMe.txt1 There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers.
2 The best option depends on the revision of the ARM Cortex-M7 core in use. The
4 like 'r0p1'. Check the documentation for the microcontroller in use to find the
5 revision of the Cortex-M7 core used in that microcontroller. If in doubt, use
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
12 If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
16 If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1
/Kernel-v10.6.2/portable/RVDS/ARM_CM7/
HDReadMe.txt1 There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers.
2 The best option depends on the revision of the ARM Cortex-M7 core in use. The
4 like 'r0p1'. Check the documentation for the microcontroller in use to find the
5 revision of the Cortex-M7 core used in that microcontroller. If in doubt, use
9 The first option is to use the ARM Cortex-M4F port, and the second option is to
10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround.
12 If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be
13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in
16 If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM
17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1
/Kernel-v10.6.2/portable/ThirdParty/XCC/Xtensa/
HDxtensa_config.h3 * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
6 * SPDX-License-Identifier: MIT
31 * Configuration-specific information for Xtensa build. This file must be
32 * included in FreeRTOSConfig.h to properly set up the config-dependent
35 * NOTE: To enable thread-safe C library support, XT_USE_THREAD_SAFE_CLIB must
42 /* *INDENT-OFF* */
46 /* *INDENT-ON* */
55 /*-----------------------------------------------------------------------------
76 * Allocating insufficient stack space is a common source of hard-to-find errors.
81 * XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
[all …]
/Kernel-v10.6.2/portable/MPLAB/PIC32MZ/
HDportmacro.h5 * SPDX-License-Identifier: MIT
35 /* *INDENT-OFF* */
39 /* *INDENT-ON* */
41 /*-----------------------------------------------------------
48 *-----------------------------------------------------------
71 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
77 /*-----------------------------------------------------------*/
81 #define portSTACK_GROWTH -1
83 /*-----------------------------------------------------------*/
93 configMAX_SYSCALL_INTERRUPT_PRIORITY. An extra check is performed if
[all …]
/Kernel-v10.6.2/portable/MPLAB/PIC32MEC14xx/
HDportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*-----------------------------------------------------------
45 *-----------------------------------------------------------
70 /*-----------------------------------------------------------*/
74 #define portSTACK_GROWTH -1
76 /*-----------------------------------------------------------*/
89 /*-----------------------------------------------------------*/
102 /*-----------------------------------------------------------*/
[all …]
/Kernel-v10.6.2/include/
HDlist.h5 * SPDX-License-Identifier: MIT
41 * points to this marker - even though it is at the tail of the list. This
97 /* *INDENT-OFF* */
101 /* *INDENT-ON* */
104 * then check that the known values do not get corrupted during the execution of
128 …#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrity…
129 …#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrity…
130 …#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValu…
131 …#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValu…
135 … configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) &&…
[all …]

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