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Searched refs:ulPortInterruptNesting (Results 1 – 16 of 16) sorted by relevance

/Kernel-v11.1.0/portable/IAR/ARM_CA9/
Dport.c155 uint32_t ulPortInterruptNesting = 0UL; variable
245 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
314 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.s35 EXTERN ulPortInterruptNesting
91 ; Increment nesting count. r3 holds the address of ulPortInterruptNesting
92 ; for future use. r1 holds the original ulPortInterruptNesting value for
94 LDR r3, =ulPortInterruptNesting
/Kernel-v11.1.0/portable/IAR/ARM_CRx_No_GIC/
Dport.c114 volatile uint32_t ulPortInterruptNesting = 0UL; variable
203 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
267 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.s38 EXTERN ulPortInterruptNesting
166 LDR r3, =ulPortInterruptNesting
/Kernel-v11.1.0/portable/IAR/ARM_CA5_No_GIC/
DportASM.s34 EXTERN ulPortInterruptNesting
95 ; Increment nesting count. r3 holds the address of ulPortInterruptNesting
96 ; for future use. r1 holds the original ulPortInterruptNesting value for
98 LDR r3, =ulPortInterruptNesting
Dport.c105 uint32_t ulPortInterruptNesting = 0UL; variable
195 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
253 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
/Kernel-v11.1.0/portable/GCC/ARM_CRx_No_GIC/
Dport.c114 volatile uint32_t ulPortInterruptNesting = 0UL; variable
206 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
270 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.S42 .extern ulPortInterruptNesting
257 ulPortInterruptNestingConst: .word ulPortInterruptNesting
/Kernel-v11.1.0/portable/RVDS/ARM_CA9/
DportASM.s34 IMPORT ulPortInterruptNesting
87 ; Increment nesting count. r3 holds the address of ulPortInterruptNesting
88 ; for future use. r1 holds the original ulPortInterruptNesting value for
90 LDR r3, =ulPortInterruptNesting
Dport.c195 uint32_t ulPortInterruptNesting = 0UL; variable
284 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
352 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
/Kernel-v11.1.0/portable/GCC/ARM_CA9/
Dport.c208 volatile uint32_t ulPortInterruptNesting = 0UL; variable
322 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
434 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.S47 .extern ulPortInterruptNesting
329 ulPortInterruptNestingConst: .word ulPortInterruptNesting
/Kernel-v11.1.0/portable/GCC/ARM_CR5/
Dport.c263 uint32_t ulPortInterruptNesting = 0UL; variable
388 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
543 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.S47 .extern ulPortInterruptNesting
335 ulPortInterruptNestingConst: .word ulPortInterruptNesting
/Kernel-v11.1.0/portable/GCC/ARM_CRx_MPU/
Dport.c78 PRIVILEGED_DATA volatile UBaseType_t ulPortInterruptNesting = 0UL; variable
785 configASSERT( ulPortInterruptNesting == ~0UL ); in prvTaskExitError()
821 configASSERT( ulPortInterruptNesting == 0 ); in vPortEnterCritical()
DportASM.S41 .extern ulPortInterruptNesting
429 LDR R0, =ulPortInterruptNesting /* R0 = &( ulPortInterruptNesting ). */