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/Kernel-v11.1.0/portable/IAR/RISC-V/
DportContext.h69 addi sp, sp, -portCONTEXT_SIZE
70 store_x x1, 1 * portWORD_SIZE( sp )
71 store_x x5, 2 * portWORD_SIZE( sp )
72 store_x x6, 3 * portWORD_SIZE( sp )
73 store_x x7, 4 * portWORD_SIZE( sp )
74 store_x x8, 5 * portWORD_SIZE( sp )
75 store_x x9, 6 * portWORD_SIZE( sp )
76 store_x x10, 7 * portWORD_SIZE( sp )
77 store_x x11, 8 * portWORD_SIZE( sp )
78 store_x x12, 9 * portWORD_SIZE( sp )
[all …]
DportASM.s241 load_x sp, pxCurrentTCB /* Load pxCurrentTCB. */
242 load_x sp, 0( sp ) /* Read sp from first TCB member. */
244 …load_x x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the…
248 load_x x7, 4 * portWORD_SIZE( sp ) /* t2 */
249 load_x x8, 5 * portWORD_SIZE( sp ) /* s0/fp */
250 load_x x9, 6 * portWORD_SIZE( sp ) /* s1 */
251 load_x x10, 7 * portWORD_SIZE( sp ) /* a0 */
252 load_x x11, 8 * portWORD_SIZE( sp ) /* a1 */
253 load_x x12, 9 * portWORD_SIZE( sp ) /* a2 */
254 load_x x13, 10 * portWORD_SIZE( sp ) /* a3 */
[all …]
/Kernel-v11.1.0/portable/GCC/RISC-V/
DportContext.h70 addi sp, sp, -portCONTEXT_SIZE
71 store_x x1, 1 * portWORD_SIZE( sp )
72 store_x x5, 2 * portWORD_SIZE( sp )
73 store_x x6, 3 * portWORD_SIZE( sp )
74 store_x x7, 4 * portWORD_SIZE( sp )
75 store_x x8, 5 * portWORD_SIZE( sp )
76 store_x x9, 6 * portWORD_SIZE( sp )
77 store_x x10, 7 * portWORD_SIZE( sp )
78 store_x x11, 8 * portWORD_SIZE( sp )
79 store_x x12, 9 * portWORD_SIZE( sp )
[all …]
DportASM.S233 load_x sp, pxCurrentTCB /* Load pxCurrentTCB. */
234 load_x sp, 0( sp ) /* Read sp from first TCB member. */
236 …load_x x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the…
240 load_x x7, 4 * portWORD_SIZE( sp ) /* t2 */
241 load_x x8, 5 * portWORD_SIZE( sp ) /* s0/fp */
242 load_x x9, 6 * portWORD_SIZE( sp ) /* s1 */
243 load_x x10, 7 * portWORD_SIZE( sp ) /* a0 */
244 load_x x11, 8 * portWORD_SIZE( sp ) /* a1 */
245 load_x x12, 9 * portWORD_SIZE( sp ) /* a2 */
246 load_x x13, 10 * portWORD_SIZE( sp ) /* a3 */
[all …]
/Kernel-v11.1.0/portable/ThirdParty/xClang/XCOREAI/
Dportasm.S24 {set sp, r4 /* Restore the task's SP to save the rest of its context. */
36 stw r1, sp[9]
37 stw r11, sp[19]
41 stw spc, sp[1] /* save the saved program counter onto the stack... */
42 ldw r1, sp[1] /* so that we can load it into r1 (which we have already saved). */
44 {stw r1, sp[1] /* Now save it to the stack. */
67 stw dp, sp[5]
68 stw cp, sp[6]
69 stw lr, sp[7]
70 stw r0, sp[8]
[all …]
/Kernel-v11.1.0/portable/GCC/NiosII/
Dport_asm.S41 addi sp, sp, -116 # Create space on the stack.
42 stw ra, 0(sp)
44 stw at, 8(sp)
45 stw r2, 12(sp)
46 stw r3, 16(sp)
47 stw r4, 20(sp)
48 stw r5, 24(sp)
49 stw r6, 28(sp)
50 stw r7, 32(sp)
51 stw r8, 36(sp)
[all …]
/Kernel-v11.1.0/portable/ThirdParty/CDK/T-HEAD_CK802/
Dportasm.S37 ld.w sp, (r4)
39 ldw r0, (sp, 64)
41 ldw r0, (sp, 60)
43 ldw r15, (sp, 56)
44 ldm r0-r13, (sp)
45 addi sp, 68
56 subi sp, 68
57 stm r0-r13, (sp)
58 stw r15, (sp, 56)
61 stw r0, (sp, 60)
[all …]
/Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/
Dxtensa_loadstore_handler.S68 mov a0, sp
69 movi sp, LoadStoreHandlerStack
70 s32i a0, sp, 0x04 // Since a0 contains value of a1
71 s32i a2, sp, 0x08
72 s32i a3, sp, 0x0c
73 s32i a4, sp, 0x10
138 l32i a3, sp, 0x0c
142 addx2 a2, a2, sp
146 l32i a4, sp, 0x10
147 l32i a3, sp, 0x0c
[all …]
Dxtensa_vectors.S405 mov a0, sp
406 addi sp, sp, -XT_STK_FRMSZ
407 s32i a0, sp, XT_STK_A1
409 s32e a0, sp, -12 /* for debug backtrace */
412 s32i a0, sp, XT_STK_PS
414 s32i a0, sp, XT_STK_PC
416 s32e a0, sp, -16 /* for debug backtrace */
418 s32i a12, sp, XT_STK_A12 /* _xt_context_save requires A12- */
419 s32i a13, sp, XT_STK_A13 /* A13 to have already been saved */
424 s32i a0, sp, XT_STK_EXCCAUSE
[all …]
Dxtensa_context.S114 s32i a2, sp, XT_STK_A2
115 s32i a3, sp, XT_STK_A3
116 s32i a4, sp, XT_STK_A4
117 s32i a5, sp, XT_STK_A5
118 s32i a6, sp, XT_STK_A6
119 s32i a7, sp, XT_STK_A7
120 s32i a8, sp, XT_STK_A8
121 s32i a9, sp, XT_STK_A9
122 s32i a10, sp, XT_STK_A10
123 s32i a11, sp, XT_STK_A11
[all …]
Dportasm.S151 addi sp, sp,-4 /* ISR will manage FPU coprocessor by forcing */
208 l32i a3, sp, 0 /* Grab last CPENABLE before leave ISR */
209 addi sp, sp, 4
333 s32i a2, sp, 4
334 s32i a3, sp, 8
346 l32i a2, sp, 4
347 l32i a3, sp, 8
453 l32i sp, a3, TOPOFSTACK_OFFS /* SP = next_TCB->pxTopOfStack; */
457 l32i a2, sp, XT_STK_EXIT /* exit dispatcher or solicited flag */
464 l32i a2, sp, XT_SOL_THREADPTR
[all …]
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dxtensa_vectors.S558 mov a0, sp
559 addi sp, sp, -XT_STK_FRMSZ
560 s32i a0, sp, XT_STK_A1
562 s32e a0, sp, -12 /* for debug backtrace */
565 s32i a0, sp, XT_STK_PS
567 s32i a0, sp, XT_STK_PC
569 s32i a0, sp, XT_STK_A0
571 s32e a0, sp, -16 /* for debug backtrace */
573 s32i a12, sp, XT_STK_A12 /* _xt_context_save requires A12- */
574 s32i a13, sp, XT_STK_A13 /* A13 to have already been saved */
[all …]
Dxtensa_context.S104 s32i a2, sp, XT_STK_A2
105 s32i a3, sp, XT_STK_A3
106 s32i a4, sp, XT_STK_A4
107 s32i a5, sp, XT_STK_A5
108 s32i a6, sp, XT_STK_A6
109 s32i a7, sp, XT_STK_A7
110 s32i a8, sp, XT_STK_A8
111 s32i a9, sp, XT_STK_A9
112 s32i a10, sp, XT_STK_A10
113 s32i a11, sp, XT_STK_A11
[all …]
Dportasm.S269 s32i a2, sp, 4
270 s32i a3, sp, 8
282 l32i a2, sp, 4
283 l32i a3, sp, 8
375 l32i sp, a3, TOPOFSTACK_OFFS /* SP = next_TCB->pxTopOfStack; */
379 l32i a2, sp, XT_STK_EXIT /* exit dispatcher or solicited flag */
385 l32i a3, sp, XT_SOL_PS
387 l32i a12, sp, XT_SOL_A12
388 l32i a13, sp, XT_SOL_A13
389 l32i a14, sp, XT_SOL_A14
[all …]
/Kernel-v11.1.0/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/
Dfreertos_risc_v_chip_specific_extensions.h76 addi sp, sp, -( portasmADDITIONAL_CONTEXT_SIZE * portWORD_SIZE ) /* Make room for the additional re…
83 sw t0, 1 * portWORD_SIZE( sp )
84 sw t1, 2 * portWORD_SIZE( sp )
85 sw t2, 3 * portWORD_SIZE( sp )
86 sw t3, 4 * portWORD_SIZE( sp )
87 sw t4, 5 * portWORD_SIZE( sp )
88 sw t5, 6 * portWORD_SIZE( sp )
93 lw t0, 1 * portWORD_SIZE( sp ) /* Load additional registers into accessible temporary registers. */
94 lw t1, 2 * portWORD_SIZE( sp )
95 lw t2, 3 * portWORD_SIZE( sp )
[all …]
/Kernel-v11.1.0/portable/GCC/AVR32_UC3/
Dexception.S225 lddsp r12, sp[0 * 4]
226 stdsp sp[6 * 4], r12
227 lddsp r12, sp[1 * 4]
228 stdsp sp[7 * 4], r12
229 lddsp r12, sp[3 * 4]
230 sub sp, -6 * 4
248 lddsp r12, sp[0 * 4]
249 stdsp sp[6 * 4], r12
250 lddsp r12, sp[1 * 4]
251 stdsp sp[7 * 4], r12
[all …]
/Kernel-v11.1.0/portable/GCC/ColdFire_V2/
Dportasm.S47 lea.l (-60, %sp), %sp
48 movem.l %d0-%fp, (%sp)
50 move.l %sp, (%a0)
57 move.l (%a0), %sp
58 movem.l (%sp), %d0-%fp
59 lea.l %sp@(60), %sp
100 move.l 4(sp),d0
/Kernel-v11.1.0/portable/CodeWarrior/ColdFire_V2/
Dport.c45 lea.l (-60, %sp), %sp; \
46 movem.l %d0-%fp, (%sp); \
48 move.l %sp, (%a0);
52 move.l (%a0), %sp; \
53 movem.l (%sp), %d0-%fp; \
54 lea.l %sp@(60), %sp; \
Dportasm.S53 lea.l (-60, sp), sp
54 movem.l d0-a6, (sp)
56 move.l sp, (a0)
63 move.l (a0), sp
64 movem.l (sp), d0-a6
65 lea.l (60, sp), sp
108 move.l 4(sp),d0
/Kernel-v11.1.0/portable/CodeWarrior/ColdFire_V1/
Dportasm.S53 lea.l (-60, sp), sp
54 movem.l d0-a6, (sp)
56 move.l sp, (a0)
63 move.l (a0), sp
64 movem.l (sp), d0-a6
65 lea.l (60, sp), sp
108 move.l 4(sp),d0
/Kernel-v11.1.0/portable/MPLAB/PIC32MX/
Dport_asm.S90 addiu sp, sp, -portCONTEXT_SIZE
95 sw s6, 44(sp)
96 sw s5, 40(sp)
97 sw k1, portSTATUS_STACK_LOCATION(sp)
105 add s5, zero, sp
110 la sp, xISRStackTop
111 lw sp, (sp)
248 add sp, zero, s5
251 lw s5, 40(sp)
254 lw k1, portSTATUS_STACK_LOCATION(sp)
[all …]
DISR_Support.h42 addiu sp, sp, -portCONTEXT_SIZE
47 sw s6, 44(sp)
48 sw s5, 40(sp)
49 sw k1, portSTATUS_STACK_LOCATION(sp)
57 add s5, zero, sp
69 la sp, xISRStackTop
70 lw sp, (sp)
181 add sp, zero, s5
182 lw s5, 40(sp)
183 addiu sp, sp, portCONTEXT_SIZE
/Kernel-v11.1.0/portable/MPLAB/PIC32MEC14xx/
DISR_Support.h44 addiu sp, sp, -portCONTEXT_SIZE
49 sw s6, 44(sp)
50 sw s5, 40(sp)
51 sw k1, portSTATUS_STACK_LOCATION(sp)
75 add s5, zero, sp
87 la sp, xISRStackTop
88 lw sp, (sp)
202 add sp, zero, s5
203 lw s5, 40(sp)
204 addiu sp, sp, portCONTEXT_SIZE
Dport_asm.S165 addiu sp, sp, -portCONTEXT_SIZE
170 sw s6, 44(sp)
171 sw s5, 40(sp)
172 sw k1, portSTATUS_STACK_LOCATION(sp)
181 add s5, zero, sp
186 la sp, xISRStackTop
187 lw sp, (sp)
327 add sp, zero, s5
330 lw s5, 40(sp)
333 lw k1, portSTATUS_STACK_LOCATION(sp)
[all …]
/Kernel-v11.1.0/portable/MPLAB/PIC32MZ/
DISR_Support.h127 addiu sp, sp, -portCONTEXT_SIZE
145 addiu sp, sp, -portFPU_CONTEXT_SIZE
149 sw k1, portTASK_HAS_FPU_STACK_LOCATION(sp)
158 sw s7, 48(sp)
159 sw s6, 44(sp)
160 sw s5, 40(sp)
161 sw k1, portSTATUS_STACK_LOCATION(sp)
171 add s5, zero, sp
183 la sp, xISRStackTop
184 lw sp, (sp)
[all …]

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