Searched refs:base (Results 1 – 10 of 10) sorted by relevance
| /Kernel-v11.1.0/portable/MPLAB/PIC32MZ/ |
| D | ISR_Support.h | 39 .macro portSAVE_FPU_REGS offset, base
44 sdc1 $f31, \offset + 248(\base)
45 sdc1 $f30, \offset + 240(\base)
46 sdc1 $f29, \offset + 232(\base)
47 sdc1 $f28, \offset + 224(\base)
48 sdc1 $f27, \offset + 216(\base)
49 sdc1 $f26, \offset + 208(\base)
50 sdc1 $f25, \offset + 200(\base)
51 sdc1 $f24, \offset + 192(\base)
52 sdc1 $f23, \offset + 184(\base)
[all …]
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| /Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/ |
| D | portclib.c | 101 char * base; in _sbrk_r() local
106 base = heap_ptr; in _sbrk_r()
113 return base; in _sbrk_r()
201 char * base; in _sbrk_r() local
206 base = heap_ptr; in _sbrk_r()
213 return base; in _sbrk_r()
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| D | readme_xtensa.txt | 679 spilled some registers to the 16 byte "base save" area below the
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| /Kernel-v11.1.0/portable/GCC/ARM_AARCH64/ |
| D | README.md | 6 registers and allows instructions in the base instruction set to use 64-bit
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| /Kernel-v11.1.0/portable/GCC/ARM_AARCH64_SRE/ |
| D | README.md | 6 registers and allows instructions in the base instruction set to use 64-bit
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| /Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/ |
| D | port.c | 230 …const uint32_t base = ( tcb_size + tls_section_alignment - 1 ) & ( ~( tls_section_alignment - 1 ) … in pxPortInitialiseStack() local
231 …ead_local_start - ( ( uint32_t ) &_thread_local_start - ( uint32_t ) &_flash_rodata_start ) - base; in pxPortInitialiseStack()
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| /Kernel-v11.1.0/ |
| D | README.md | 175 FreeRTOS code base are correct. If your pull request fails to pass the spelling
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| D | History.txt | 111 base priority of a task. The base priority of a task is the priority that
1862 type, which can be base, mutex, counting semaphore, binary semaphore
2029 more flexibility in how the time base for the run time statistics feature
2514 the SafeRTOS code base.
3186 8MHz base 10, previously it base 16.
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| /Kernel-v11.1.0/include/ |
| D | FreeRTOS.h | 2667 …nction to setup a peripheral timer/counter that can then be used as the run time counter time base.
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| /Kernel-v11.1.0/portable/GCC/ARM7_AT91SAM7S/ |
| D | ioat91sam7x256.h | 6363 -Internal SRAM base address
6367 -Internal ROM base address
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