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Searched refs:R0 (Results 1 – 25 of 40) sorted by relevance

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/Kernel-v11.0.1/portable/CCS/ARM_Cortex-R4/
DportASM.asm43 ; Push R0 as we are going to use it
44 STMDB SP!, {R0}
46 ; Set R0 to point to the task stack pointer.
49 LDMIA SP!,{R0}
52 STMDB R0!, {LR}
54 ; Now LR has been saved, it can be used instead of R0.
55 MOV LR, R0
57 ; Pop R0 so it can be saved onto the task stack.
58 LDMIA SP!, {R0}
61 STMDB LR,{R0-LR}^
[all …]
/Kernel-v11.0.1/portable/IAR/STR71x/
DISR_Support.h39 Push R0 as we are going to use the register.
41 R0
44 Set R0 to point to the task stack pointer.
52 R0
57 STMDB R0 !, {
61 Now we have saved LR we can use it instead of R0.
62 MOV LR, R0
66 Pop R0 so we can save it onto the system mode stack.
68 R0
73 R0 - LR
[all …]
/Kernel-v11.0.1/portable/IAR/STR75x/
DISR_Support.h39 Push R0 as we are going to use the register.
41 R0
44 Set R0 to point to the task stack pointer.
52 R0
57 STMDB R0 !, {
61 Now we have saved LR we can use it instead of R0.
62 MOV LR, R0
66 Pop R0 so we can save it onto the system mode stack.
68 R0
73 R0 - LR
[all …]
/Kernel-v11.0.1/portable/IAR/STR91x/
DISR_Support.h39 Push R0 as we are going to use the register.
41 R0
44 Set R0 to point to the task stack pointer.
52 R0
57 STMDB R0 !, {
61 Now we have saved LR we can use it instead of R0.
62 MOV LR, R0
66 Pop R0 so we can save it onto the system mode stack.
68 R0
73 R0 - LR
[all …]
/Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/
DISR_Support.h39 Push R0 as we are going to use the register.
41 R0
44 Set R0 to point to the task stack pointer.
52 R0
57 STMDB R0 !, {
61 Now we have saved LR we can use it instead of R0.
62 MOV LR, R0
66 Pop R0 so we can save it onto the system mode stack.
68 R0
73 R0 - LR
[all …]
Dportasm.s7957 LDR R0, =vTaskSwitchContext ; before selecting the next task to execute.
59 BX R0
69 LDR R0, =xTaskIncrementTick ; Increment the tick count - this may wake a task.
71 BX R0
73 CMP R0, #0
75 LDR R0, =vTaskSwitchContext ; Select the next task to execute.
77 BX R0
80 LDR R0, [R14, #PITC_PIVR ]
/Kernel-v11.0.1/portable/IAR/AtmelSAM9XE/
DISR_Support.h38 Push R0 as we are going to use the register.
40 R0
43 Set R0 to point to the task stack pointer.
51 R0
56 STMDB R0 !, {
60 Now we have saved LR we can use it instead of R0.
61 MOV LR, R0
65 Pop R0 so we can save it onto the system mode stack.
67 R0
72 R0 - LR
[all …]
/Kernel-v11.0.1/portable/IAR/LPC2000/
DISR_Support.h39 Push R0 as we are going to use the register.
41 R0
44 Set R0 to point to the task stack pointer.
52 R0
57 STMDB R0 !, {
61 Now we have saved LR we can use it instead of R0.
62 MOV LR, R0
66 Pop R0 so we can save it onto the system mode stack.
68 R0
73 R0 - LR
[all …]
/Kernel-v11.0.1/portable/RVDS/ARM7_LPC21xx/
Dportmacro.inc37 LDR R0, =pxCurrentTCB ; Set the LR to the task stack. The location was...
38 LDR R0, [R0] ; ... stored in pxCurrentTCB
39 LDR LR, [R0]
41 LDR R0, =ulCriticalNesting ; The critical nesting depth is the first item on...
43 STR R1, [R0] ;
45 LDMFD LR!, {R0} ; Get the SPSR from the stack.
46 MSR SPSR_cxsf, R0 ;
48 LDMFD LR, {R0-R14}^ ; Restore all system mode registers for the task.
64 STMDB SP!, {R0} ; Store R0 first as we need to use it.
66 STMDB SP,{SP}^ ; Set R0 to point to the task stack pointer.
[all …]
DportASM.s85 LDR R0, =vTaskSwitchContext ; Get the address of the context switch function
87 BX R0 ; Call the contedxt switch function
105 LDR R0, =xTaskIncrementTick ; Increment the tick count.
107 BX R0 ; to run.
109 CMP R0, #0
111 LDR R0, =vTaskSwitchContext ; Find the highest priority task that
113 BX R0
115 MOV R0, #T0MATCHBIT ; Clear the timer event
117 STR R0, [R1]
119 LDR R0, =VICVECTADDR ; Acknowledge the interrupt
[all …]
/Kernel-v11.0.1/portable/Softune/MB91460/
Dport.c46 STM0 (R7,R6,R5,R4,R3,R2,R1,R0) ;Store R7-R0
52 LD @R15+,R0 ;Store PC to R0
54 ST R0,@-R15 ;Store PC to User stack variable
57 LD @R15+,R0 ;Store PS to R0
59 ST R0,@-R15 ;Store PS to User stack variable
61 LDI #_pxCurrentTCB, R0 ;Get pxCurrentTCB address
62 LD @R0, R0 ;Get the pxCurrentTCB->pxTopOfStack address
63 ST R15,@R0 ;Store USP to pxCurrentTCB->pxTopOfStack
69 LDI #_pxCurrentTCB, R0 ;Get pxCurrentTCB address
70 LD @R0, R0 ;Get the pxCurrentTCB->pxTopOfStack address
[all …]
/Kernel-v11.0.1/portable/GCC/PPC405_Xilinx/
Dportasm.S61 xor R0, R0, R0
62 addis R2, R0, pxCurrentTCB@ha
70 mflr R0
72 stw R0, 28( R1 )
81 lwz R0, 4( R11 )
82 mtlr R0
87 xor R0, R0, R0
88 addis SP, R0, pxCurrentTCB@ha
100 xor R0, R0, R0
101 addis SP, R0, pxCurrentTCB@ha
[all …]
/Kernel-v11.0.1/portable/GCC/PPC440_Xilinx/
Dportasm.S61 xor R0, R0, R0
62 addis R2, R0, pxCurrentTCB@ha
70 mflr R0
72 stw R0, 28( R1 )
81 lwz R0, 4( R11 )
82 mtlr R0
87 xor R0, R0, R0
88 addis SP, R0, pxCurrentTCB@ha
100 xor R0, R0, R0
101 addis SP, R0, pxCurrentTCB@ha
[all …]
/Kernel-v11.0.1/portable/IAR/ARM_CRx_No_GIC/
DportASM.s57 PUSH {R0-R12, R14}
82 LDR R0, =pxCurrentTCB
83 LDR R1, [R0]
93 LDR R0, =pxCurrentTCB
94 LDR R1, [R0]
99 LDR R0, =ulPortTaskHasFPUContext
101 STR R1, [R0]
105 POPNE {R0}
110 VMSRNE FPSCR, R0
113 LDR R0, =ulCriticalNesting
[all …]
/Kernel-v11.0.1/portable/GCC/ARM_CRx_No_GIC/
DportASM.S58 PUSH {R0-R12, R14}
83 LDR R0, pxCurrentTCBConst
84 LDR R1, [R0]
94 LDR R0, pxCurrentTCBConst
95 LDR R1, [R0]
100 LDR R0, ulPortTaskHasFPUContextConst
102 STR R1, [R0]
106 POPNE {R0}
111 VMSRNE FPSCR, R0
114 LDR R0, ulCriticalNestingConst
[all …]
/Kernel-v11.0.1/portable/GCC/ARM_CR5/
DportASM.S63 PUSH {R0-R12, R14}
87 LDR R0, pxCurrentTCBConst
88 LDR R1, [R0]
98 LDR R0, pxCurrentTCBConst
99 LDR R1, [R0]
107 LDR R0, ulPortTaskHasFPUContextConst
109 STR R1, [R0]
113 POPNE {R0}
115 VMSRNE FPSCR, R0
119 LDR R0, ulCriticalNestingConst
[all …]
/Kernel-v11.0.1/portable/GCC/ARM_CA9/
DportASM.S63 PUSH {R0-R12, R14}
86 LDR R0, pxCurrentTCBConst
87 LDR R1, [R0]
97 LDR R0, pxCurrentTCBConst
98 LDR R1, [R0]
103 LDR R0, ulPortTaskHasFPUContextConst
105 STR R1, [R0]
111 POPNE {R0}
112 VMSRNE FPSCR, R0
115 LDR R0, ulCriticalNestingConst
[all …]
/Kernel-v11.0.1/portable/IAR/ARM_CA9/
DportASM.h44 R0 - R12, R14
87 LDR R0, = pxCurrentTCB
88 LDR R1, [ R0 ]
99 LDR R0, = pxCurrentTCB
100 LDR R1, [ R0 ]
107 LDR R0, = ulPortTaskHasFPUContext
111 STR R1, [ R0 ]
119 R0
128 VMSRNE FPSCR, R0
132 LDR R0, = ulCriticalNesting
[all …]
/Kernel-v11.0.1/portable/IAR/ARM_CA5_No_GIC/
DportASM.h44 R0 - R12, R14
89 LDR R0, = pxCurrentTCB
90 LDR R1, [ R0 ]
101 LDR R0, = pxCurrentTCB
102 LDR R1, [ R0 ]
109 LDR R0, = ulPortTaskHasFPUContext
113 STR R1, [ R0 ]
121 R0
132 VMSRNE FPSCR, R0
136 LDR R0, = ulCriticalNesting
[all …]
/Kernel-v11.0.1/portable/IAR/RX100/
Dport_asm.s50 MOV.L [R15], R0
93 MOV.L [ R0 ], [ R15 ]
94 MOV.L 4[ R0 ], 4[ R15 ]
95 MOV.L 8[ R0 ], 8[ R15 ]
98 ADD #12, R0
120 MOV.L R0, [ R15 ]
136 MOV.L [ R15 ], R0
/Kernel-v11.0.1/portable/IAR/RX600/
Dport_asm.s50 MOV.L [R15], R0
97 MOV.L [ R0 ], [ R15 ]
98 MOV.L 4[ R0 ], 4[ R15 ]
99 MOV.L 8[ R0 ], 8[ R15 ]
102 ADD #12, R0
126 MOV.L R0, [ R15 ]
142 MOV.L [ R15 ], R0
/Kernel-v11.0.1/portable/RVDS/ARM_CA9/
Dportmacro.inc47 PUSH {R0-R12, R14}
70 LDR R0, =pxCurrentTCB
71 LDR R1, [R0]
82 LDR R0, =pxCurrentTCB
83 LDR R1, [R0]
88 LDR R0, =ulPortTaskHasFPUContext
90 STR R1, [R0]
94 POPNE {R0}
97 VMSRNE FPSCR, R0
100 LDR R0, =ulCriticalNesting
[all …]
/Kernel-v11.0.1/portable/IAR/RXv2/
Dport_asm.s50 MOV.L [R15], R0
113 MOV.L [ R0 ], [ R15 ]
114 MOV.L 4[ R0 ], 4[ R15 ]
115 MOV.L 8[ R0 ], 8[ R15 ]
118 ADD #12, R0
147 MOV.L R0, [ R15 ]
163 MOV.L [ R15 ], R0
/Kernel-v11.0.1/portable/Renesas/RX200/
Dport.c202 MOV.L [R15], R0 in prvStartFirstTask()
259 MOV.L [ R0 ], [ R15 ] ; R15 in prvYieldHandler()
260 MOV.L 4[ R0 ], 4[ R15 ] ; PC in prvYieldHandler()
261 MOV.L 8[ R0 ], 8[ R15 ] ; PSW in prvYieldHandler()
264 ADD #12, R0 in prvYieldHandler()
282 MOV.L R0, [ R15 ] in prvYieldHandler()
298 MOV.L [ R15 ], R0 in prvYieldHandler()
/Kernel-v11.0.1/portable/Renesas/RX600/
Dport.c201 MOV.L [R15], R0 in prvStartFirstTask()
260 MOV.L [ R0 ], [ R15 ] ; R15 in prvYieldHandler()
261 MOV.L 4[ R0 ], 4[ R15 ] ; PC in prvYieldHandler()
262 MOV.L 8[ R0 ], 8[ R15 ] ; PSW in prvYieldHandler()
265 ADD #12, R0 in prvYieldHandler()
285 MOV.L R0, [ R15 ] in prvYieldHandler()
301 MOV.L [ R15 ], R0 in prvYieldHandler()

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