Searched refs:AT91PS_PDC (Results 1 – 9 of 9) sorted by relevance
| /Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/ |
| D | lib_AT91SAM7X128.h | 212 __inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextRx() 224 __inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextTx() 236 __inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetRx() 248 __inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetTx() 260 __inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableTx() 269 __inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableRx() 278 __inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableTx() 287 __inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableRx() 297 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsTxEmpty() 307 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsNextTxEmpty() [all …]
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| D | lib_AT91SAM7X256.h | 212 __inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextRx() 224 __inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextTx() 236 __inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetRx() 248 __inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetTx() 260 __inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableTx() 269 __inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableRx() 278 __inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableTx() 287 __inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableRx() 297 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsTxEmpty() 307 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsNextTxEmpty() [all …]
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| D | lib_AT91SAM7S64.h | 125 __inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextRx() 137 __inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextTx() 149 __inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetRx() 161 __inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetTx() 173 __inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableTx() 182 __inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableRx() 191 __inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableTx() 200 __inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableRx() 210 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsTxEmpty() 220 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsNextTxEmpty() [all …]
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| D | AT91SAM7X128.h | 275 } AT91S_PDC, * AT91PS_PDC; typedef 2685 #define AT91C_BASE_PDC_DBGU ( ( AT91PS_PDC ) 0xFFFFF300 ) /* (PDC_DBGU) Base Address */ 2697 #define AT91C_BASE_PDC_SPI1 ( ( AT91PS_PDC ) 0xFFFE4100 ) /* (PDC_SPI1) Base Address */ 2699 #define AT91C_BASE_PDC_SPI0 ( ( AT91PS_PDC ) 0xFFFE0100 ) /* (PDC_SPI0) Base Address */ 2701 #define AT91C_BASE_PDC_US1 ( ( AT91PS_PDC ) 0xFFFC4100 ) /* (PDC_US1) Base Address */ 2703 #define AT91C_BASE_PDC_US0 ( ( AT91PS_PDC ) 0xFFFC0100 ) /* (PDC_US0) Base Address */ 2705 #define AT91C_BASE_PDC_SSC ( ( AT91PS_PDC ) 0xFFFD4100 ) /* (PDC_SSC) Base Address */ 2728 #define AT91C_BASE_PDC_ADC ( ( AT91PS_PDC ) 0xFFFD8100 ) /* (PDC_ADC) Base Address */ 2730 #define AT91C_BASE_PDC_AES ( ( AT91PS_PDC ) 0xFFFA4100 ) /* (PDC_AES) Base Address */ 2732 #define AT91C_BASE_PDC_TDES ( ( AT91PS_PDC ) 0xFFFA8100 ) /* (PDC_TDES) Base Address */
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| D | AT91SAM7X256.h | 275 } AT91S_PDC, * AT91PS_PDC; typedef 2685 #define AT91C_BASE_PDC_DBGU ( ( AT91PS_PDC ) 0xFFFFF300 ) /* (PDC_DBGU) Base Address */ 2697 #define AT91C_BASE_PDC_SPI1 ( ( AT91PS_PDC ) 0xFFFE4100 ) /* (PDC_SPI1) Base Address */ 2699 #define AT91C_BASE_PDC_SPI0 ( ( AT91PS_PDC ) 0xFFFE0100 ) /* (PDC_SPI0) Base Address */ 2701 #define AT91C_BASE_PDC_US1 ( ( AT91PS_PDC ) 0xFFFC4100 ) /* (PDC_US1) Base Address */ 2703 #define AT91C_BASE_PDC_US0 ( ( AT91PS_PDC ) 0xFFFC0100 ) /* (PDC_US0) Base Address */ 2705 #define AT91C_BASE_PDC_SSC ( ( AT91PS_PDC ) 0xFFFD4100 ) /* (PDC_SSC) Base Address */ 2728 #define AT91C_BASE_PDC_ADC ( ( AT91PS_PDC ) 0xFFFD8100 ) /* (PDC_ADC) Base Address */ 2730 #define AT91C_BASE_PDC_AES ( ( AT91PS_PDC ) 0xFFFA4100 ) /* (PDC_AES) Base Address */ 2732 #define AT91C_BASE_PDC_TDES ( ( AT91PS_PDC ) 0xFFFA8100 ) /* (PDC_TDES) Base Address */
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| D | AT91SAM7S64.h | 294 } AT91S_PDC, * AT91PS_PDC; typedef 1897 #define AT91C_BASE_PDC_DBGU ( ( AT91PS_PDC ) 0xFFFFF300 ) /* (PDC_DBGU) Base Address */ 1906 #define AT91C_BASE_PDC_SPI ( ( AT91PS_PDC ) 0xFFFE0100 ) /* (PDC_SPI) Base Address */ 1908 #define AT91C_BASE_PDC_ADC ( ( AT91PS_PDC ) 0xFFFD8100 ) /* (PDC_ADC) Base Address */ 1910 #define AT91C_BASE_PDC_SSC ( ( AT91PS_PDC ) 0xFFFD4100 ) /* (PDC_SSC) Base Address */ 1912 #define AT91C_BASE_PDC_US1 ( ( AT91PS_PDC ) 0xFFFC4100 ) /* (PDC_US1) Base Address */ 1914 #define AT91C_BASE_PDC_US0 ( ( AT91PS_PDC ) 0xFFFC0100 ) /* (PDC_US0) Base Address */
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| /Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/ |
| D | lib_AT91SAM7X256.h | 212 __inline void AT91F_PDC_SetNextRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextRx() 224 __inline void AT91F_PDC_SetNextTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetNextTx() 236 __inline void AT91F_PDC_SetRx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetRx() 248 __inline void AT91F_PDC_SetTx( AT91PS_PDC pPDC, /* \arg pointer to a PDC controller */ in AT91F_PDC_SetTx() 260 __inline void AT91F_PDC_EnableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableTx() 269 __inline void AT91F_PDC_EnableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_EnableRx() 278 __inline void AT91F_PDC_DisableTx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableTx() 287 __inline void AT91F_PDC_DisableRx( AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_DisableRx() 297 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsTxEmpty() 307 AT91PS_PDC pPDC ) /* \arg pointer to a PDC controller */ in AT91F_PDC_IsNextTxEmpty() [all …]
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| D | AT91SAM7X256.h | 275 } AT91S_PDC, * AT91PS_PDC; typedef 2685 #define AT91C_BASE_PDC_DBGU ( ( AT91PS_PDC ) 0xFFFFF300 ) /* (PDC_DBGU) Base Address */ 2697 #define AT91C_BASE_PDC_SPI1 ( ( AT91PS_PDC ) 0xFFFE4100 ) /* (PDC_SPI1) Base Address */ 2699 #define AT91C_BASE_PDC_SPI0 ( ( AT91PS_PDC ) 0xFFFE0100 ) /* (PDC_SPI0) Base Address */ 2701 #define AT91C_BASE_PDC_US1 ( ( AT91PS_PDC ) 0xFFFC4100 ) /* (PDC_US1) Base Address */ 2703 #define AT91C_BASE_PDC_US0 ( ( AT91PS_PDC ) 0xFFFC0100 ) /* (PDC_US0) Base Address */ 2705 #define AT91C_BASE_PDC_SSC ( ( AT91PS_PDC ) 0xFFFD4100 ) /* (PDC_SSC) Base Address */ 2728 #define AT91C_BASE_PDC_ADC ( ( AT91PS_PDC ) 0xFFFD8100 ) /* (PDC_ADC) Base Address */ 2730 #define AT91C_BASE_PDC_AES ( ( AT91PS_PDC ) 0xFFFA4100 ) /* (PDC_AES) Base Address */ 2732 #define AT91C_BASE_PDC_TDES ( ( AT91PS_PDC ) 0xFFFA8100 ) /* (PDC_TDES) Base Address */
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| D | ioat91sam7x256.h | 275 } AT91S_PDC, * AT91PS_PDC; typedef 2685 #define AT91C_BASE_PDC_DBGU ( ( AT91PS_PDC ) 0xFFFFF300 ) /* (PDC_DBGU) Base Address */ 2697 #define AT91C_BASE_PDC_SPI1 ( ( AT91PS_PDC ) 0xFFFE4100 ) /* (PDC_SPI1) Base Address */ 2699 #define AT91C_BASE_PDC_SPI0 ( ( AT91PS_PDC ) 0xFFFE0100 ) /* (PDC_SPI0) Base Address */ 2701 #define AT91C_BASE_PDC_US1 ( ( AT91PS_PDC ) 0xFFFC4100 ) /* (PDC_US1) Base Address */ 2703 #define AT91C_BASE_PDC_US0 ( ( AT91PS_PDC ) 0xFFFC0100 ) /* (PDC_US0) Base Address */ 2705 #define AT91C_BASE_PDC_SSC ( ( AT91PS_PDC ) 0xFFFD4100 ) /* (PDC_SSC) Base Address */ 2728 #define AT91C_BASE_PDC_ADC ( ( AT91PS_PDC ) 0xFFFD8100 ) /* (PDC_ADC) Base Address */ 2730 #define AT91C_BASE_PDC_AES ( ( AT91PS_PDC ) 0xFFFA4100 ) /* (PDC_AES) Base Address */ 2732 #define AT91C_BASE_PDC_TDES ( ( AT91PS_PDC ) 0xFFFA8100 ) /* (PDC_TDES) Base Address */
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