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Searched refs:AT91C_PWMC_CPD (Results 1 – 8 of 8) sorted by relevance

/Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h1153 #define AT91C_PWMC_CPD ( 0x1 << 10 ) /* (PWMC_CH) Channel Update Period */ macro
DAT91SAM7X128_inc.h797 #define AT91C_PWMC_CPD ( 0x1 << 10 ) /* (PWMC_CH) Channel Update Period */ macro
DAT91SAM7X256_inc.h797 #define AT91C_PWMC_CPD ( 0x1 << 10 ) /* (PWMC_CH) Channel Update Period */ macro
DAT91SAM7S64.h1266 #define AT91C_PWMC_CPD ( ( unsigned int ) 0x1 << 10 ) /* (PWMC_CH) Channel Update Peri… macro
DAT91SAM7X128.h1039 #define AT91C_PWMC_CPD ( ( unsigned int ) 0x1 << 10 ) /* (PWMC_CH) Channel Update Peri… macro
DAT91SAM7X256.h1039 #define AT91C_PWMC_CPD ( ( unsigned int ) 0x1 << 10 ) /* (PWMC_CH) Channel Update Peri… macro
/Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h1039 #define AT91C_PWMC_CPD ( ( unsigned int ) 0x1 << 10 ) /* (PWMC_CH) Channel Update Peri… macro
Dioat91sam7x256.h1039 #define AT91C_PWMC_CPD ( ( unsigned int ) 0x1 << 10 ) /* (PWMC_CH) Channel Update Peri… macro
3678 AT91C_PWMC_CPD EQU( 0x1 << 10 );