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Searched refs:AT91C_PWMC_CH1_CDTYR (Results 1 – 6 of 6) sorted by relevance

/Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/
DAT91SAM7X128_inc.h1898 #define AT91C_PWMC_CH1_CDTYR ( 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle Register */ macro
DAT91SAM7X256_inc.h1898 #define AT91C_PWMC_CH1_CDTYR ( 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle Register */ macro
DAT91SAM7X128.h2195 #define AT91C_PWMC_CH1_CDTYR ( ( AT91_REG * ) 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle R… macro
DAT91SAM7X256.h2195 #define AT91C_PWMC_CH1_CDTYR ( ( AT91_REG * ) 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle R… macro
/Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h2195 #define AT91C_PWMC_CH1_CDTYR ( ( AT91_REG * ) 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle R… macro
Dioat91sam7x256.h2195 #define AT91C_PWMC_CH1_CDTYR ( ( AT91_REG * ) 0xFFFCC224 ) /* (PWMC_CH1) Channel Duty Cycle R… macro
5315 AT91C_PWMC_CH1_CDTYR EQU( 0xFFFCC224 );