Searched refs:AT91C_PIO_PA5 (Results 1 – 8 of 8) sorted by relevance
1715 #define AT91C_PIO_PA5 ( 1 << 5 ) /* Pin Controlled by PA5 */ macro1716 #define AT91C_PA5_RXD0 ( AT91C_PIO_PA5 ) /* USART 0 Receive Data */1717 #define AT91C_PA5_NPCS3 ( AT91C_PIO_PA5 ) /* SPI Peripheral Chip Select 3 */
1839 #define AT91C_PIO_PA5 ( ( unsigned int ) 1 << 5 ) /* Pin Controlled by PA5 */ macro1840 #define AT91C_PA5_RXD0 ( ( unsigned int ) AT91C_PIO_PA5 ) /* USART 0 Receive Data */1841 #define AT91C_PA5_NPCS3 ( ( unsigned int ) AT91C_PIO_PA5 ) /* SPI Peripheral Chip Select 3 */
2250 #define AT91C_PIO_PA5 ( 1 << 5 ) /* Pin Controlled by PA5 */ macro2251 #define AT91C_PA5_RXD1 ( AT91C_PIO_PA5 ) /* USART 1 Receive Data */
2547 #define AT91C_PIO_PA5 ( ( unsigned int ) 1 << 5 ) /* Pin Controlled by PA5 */ macro2548 #define AT91C_PA5_RXD1 ( ( unsigned int ) AT91C_PIO_PA5 ) /* USART 1 Receive Data */
2547 #define AT91C_PIO_PA5 ( ( unsigned int ) 1 << 5 ) /* Pin Controlled by PA5 */ macro2548 #define AT91C_PA5_RXD1 ( ( unsigned int ) AT91C_PIO_PA5 ) /* USART 1 Receive Data */5992 AT91C_PIO_PA5 EQU( 1 << 5 );5994 AT91C_PA5_RXD1 EQU( AT91C_PIO_PA5 );
