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Searched refs:AT91C_MC_FWS_2FWS (Results 1 – 8 of 8) sorted by relevance

/Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h512 #define AT91C_MC_FWS_2FWS ( 0x2 << 8 ) /* (MC) 3 cycles for Read, 4 for Write op… macro
DAT91SAM7X128_inc.h436 #define AT91C_MC_FWS_2FWS ( 0x2 << 8 ) /* (MC) 3 cycles for Read, 4 for Write op… macro
DAT91SAM7X256_inc.h436 #define AT91C_MC_FWS_2FWS ( 0x2 << 8 ) /* (MC) 3 cycles for Read, 4 for Write op… macro
DAT91SAM7S64.h587 #define AT91C_MC_FWS_2FWS ( ( unsigned int ) 0x2 << 8 ) /* (MC) 3 cycles for Rea… macro
DAT91SAM7X128.h652 #define AT91C_MC_FWS_2FWS ( ( unsigned int ) 0x2 << 8 ) /* (MC) 3 cycles for Rea… macro
DAT91SAM7X256.h652 #define AT91C_MC_FWS_2FWS ( ( unsigned int ) 0x2 << 8 ) /* (MC) 3 cycles for Rea… macro
/Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h652 #define AT91C_MC_FWS_2FWS ( ( unsigned int ) 0x2 << 8 ) /* (MC) 3 cycles for Rea… macro
Dioat91sam7x256.h652 #define AT91C_MC_FWS_2FWS ( ( unsigned int ) 0x2 << 8 ) /* (MC) 3 cycles for Rea… macro
3178 AT91C_MC_FWS_2FWS EQU( 0x2 << 8 );