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Searched refs:AT91C_CKGR_USBDIV_0 (Results 1 – 8 of 8) sorted by relevance

/Kernel-v11.0.1/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h324 #define AT91C_CKGR_USBDIV_0 ( 0x0 << 28 ) /* (CKGR) Divider output is PLL clock output */ macro
DAT91SAM7X128_inc.h239 #define AT91C_CKGR_USBDIV_0 ( 0x0 << 28 ) /* (CKGR) Divider output is PLL clock output */ macro
DAT91SAM7X256_inc.h239 #define AT91C_CKGR_USBDIV_0 ( 0x0 << 28 ) /* (CKGR) Divider output is PLL clock output */ macro
DAT91SAM7S64.h376 #define AT91C_CKGR_USBDIV_0 ( ( unsigned int ) 0x0 << 28 ) /* (CKGR) Divider output is P… macro
DAT91SAM7X128.h428 #define AT91C_CKGR_USBDIV_0 ( ( unsigned int ) 0x0 << 28 ) /* (CKGR) Divider output is P… macro
DAT91SAM7X256.h428 #define AT91C_CKGR_USBDIV_0 ( ( unsigned int ) 0x0 << 28 ) /* (CKGR) Divider output is P… macro
/Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h428 #define AT91C_CKGR_USBDIV_0 ( ( unsigned int ) 0x0 << 28 ) /* (CKGR) Divider output is P… macro
Dioat91sam7x256.h428 #define AT91C_CKGR_USBDIV_0 ( ( unsigned int ) 0x0 << 28 ) /* (CKGR) Divider output is P… macro
2920 AT91C_CKGR_USBDIV_0 EQU( 0x0 << 28 );