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Searched refs:base (Results 1 – 8 of 8) sorted by relevance

/Kernel-v10.6.2/portable/MPLAB/PIC32MZ/
DISR_Support.h39 .macro portSAVE_FPU_REGS offset, base
44 sdc1 $f31, \offset + 248(\base)
45 sdc1 $f30, \offset + 240(\base)
46 sdc1 $f29, \offset + 232(\base)
47 sdc1 $f28, \offset + 224(\base)
48 sdc1 $f27, \offset + 216(\base)
49 sdc1 $f26, \offset + 208(\base)
50 sdc1 $f25, \offset + 200(\base)
51 sdc1 $f24, \offset + 192(\base)
52 sdc1 $f23, \offset + 184(\base)
[all …]
/Kernel-v10.6.2/portable/ThirdParty/XCC/Xtensa/
Dportclib.c101 char * base; in _sbrk_r() local
106 base = heap_ptr; in _sbrk_r()
113 return base; in _sbrk_r()
201 char * base; in _sbrk_r() local
206 base = heap_ptr; in _sbrk_r()
213 return base; in _sbrk_r()
Dreadme_xtensa.txt679 spilled some registers to the 16 byte "base save" area below the
/Kernel-v10.6.2/portable/ThirdParty/GCC/Xtensa_ESP32/
Dport.c228 …const uint32_t base = ( tcb_size + tls_section_alignment - 1 ) & ( ~( tls_section_alignment - 1 ) … in pxPortInitialiseStack() local
229 …ead_local_start - ( ( uint32_t ) &_thread_local_start - ( uint32_t ) &_flash_rodata_start ) - base; in pxPortInitialiseStack()
/Kernel-v10.6.2/
DREADME.md99 …ous jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull reque…
DHistory.txt1693 type, which can be base, mutex, counting semaphore, binary semaphore
1860 more flexibility in how the time base for the run time statistics feature
2345 the SafeRTOS code base.
3017 8MHz base 10, previously it base 16.
/Kernel-v10.6.2/include/
DFreeRTOS.h837 …nction to setup a peripheral timer/counter that can then be used as the run time counter time base.
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
Dioat91sam7x256.h4691 AT91C_ISRAM EQU (0x00200000) ;- Internal SRAM base address
4693 AT91C_IFLASH EQU (0x00100000) ;- Internal ROM base address