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Searched refs:AT91C_WDTC_WDV (Results 1 – 6 of 6) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
HDAT91SAM7X128_inc.h381 #define AT91C_WDTC_WDV (0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
HDAT91SAM7X256_inc.h381 #define AT91C_WDTC_WDV (0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
HDAT91SAM7X128.h579 #define AT91C_WDTC_WDV ((unsigned int) 0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
HDAT91SAM7X256.h579 #define AT91C_WDTC_WDV ((unsigned int) 0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
HDAT91SAM7X256.h579 #define AT91C_WDTC_WDV ((unsigned int) 0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
HDioat91sam7x256.h579 #define AT91C_WDTC_WDV ((unsigned int) 0xFFF << 0) // (WDTC) Watchdog Timer Restart macro
2932 AT91C_WDTC_WDV EQU (0xFFF << 0) ;- (WDTC) Watchdog Timer Restart