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Searched refs:AT91C_WDTC_WDRSTT (Results 1 – 6 of 6) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
HDAT91SAM7X128_inc.h378 #define AT91C_WDTC_WDRSTT (0x1 << 0) // (WDTC) Watchdog Restart macro
HDAT91SAM7X256_inc.h378 #define AT91C_WDTC_WDRSTT (0x1 << 0) // (WDTC) Watchdog Restart macro
HDAT91SAM7X128.h576 #define AT91C_WDTC_WDRSTT ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Restart macro
HDAT91SAM7X256.h576 #define AT91C_WDTC_WDRSTT ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Restart macro
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
HDAT91SAM7X256.h576 #define AT91C_WDTC_WDRSTT ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Restart macro
HDioat91sam7x256.h576 #define AT91C_WDTC_WDRSTT ((unsigned int) 0x1 << 0) // (WDTC) Watchdog Restart macro
2929 AT91C_WDTC_WDRSTT EQU (0x1 << 0) ;- (WDTC) Watchdog Restart