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Searched refs:AT91C_PWMC_CH1_CCNTR (Results 1 – 6 of 6) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
HDAT91SAM7X128_inc.h1897 #define AT91C_PWMC_CH1_CCNTR (0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
HDAT91SAM7X256_inc.h1897 #define AT91C_PWMC_CH1_CCNTR (0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
HDAT91SAM7X128.h2166 #define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
HDAT91SAM7X256.h2166 #define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
HDAT91SAM7X256.h2166 #define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
HDioat91sam7x256.h2166 #define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 0xFFFCC22C) // (PWMC_CH1) Channel Counter Register macro
4147 AT91C_PWMC_CH1_CCNTR EQU (0xFFFCC22C) ;- (PWMC_CH1) Channel Counter Register