Searched refs:AT91C_PIO_PA5 (Results 1 – 8 of 8) sorted by relevance
1715 #define AT91C_PIO_PA5 (1 << 5) // Pin Controlled by PA5 macro1716 #define AT91C_PA5_RXD0 (AT91C_PIO_PA5) // USART 0 Receive Data1717 #define AT91C_PA5_NPCS3 (AT91C_PIO_PA5) // SPI Peripheral Chip Select 3
1817 #define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 macro1818 #define AT91C_PA5_RXD0 ((unsigned int) AT91C_PIO_PA5) // USART 0 Receive Data1819 #define AT91C_PA5_NPCS3 ((unsigned int) AT91C_PIO_PA5) // SPI Peripheral Chip Select 3
2250 #define AT91C_PIO_PA5 (1 << 5) // Pin Controlled by PA5 macro2251 #define AT91C_PA5_RXD1 (AT91C_PIO_PA5) // USART 1 Receive Data
2519 #define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 macro2520 #define AT91C_PA5_RXD1 ((unsigned int) AT91C_PIO_PA5) // USART 1 Receive Data
2519 #define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 macro2520 #define AT91C_PA5_RXD1 ((unsigned int) AT91C_PIO_PA5) // USART 1 Receive Data4500 AT91C_PIO_PA5 EQU (1 << 5) ;- Pin Controlled by PA54501 AT91C_PA5_RXD1 EQU (AT91C_PIO_PA5) ;- USART 1 Receive Data
