Home
last modified time | relevance | path

Searched refs:AT91C_PIO_PA26 (Results 1 – 8 of 8) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h1691 #define AT91C_PIO_PA26 (1 << 26) // Pin Controlled by PA26 macro
1692 #define AT91C_PA26_DCD1 (AT91C_PIO_PA26) // USART 1 Data Carrier Detect
1693 #define AT91C_PA26_TIOA2 (AT91C_PIO_PA26) // Timer Counter 2 Multipurpose Timer I/O Pin A
DAT91SAM7X128_inc.h2230 #define AT91C_PIO_PA26 (1 << 26) // Pin Controlled by PA26 macro
2231 #define AT91C_PA26_RF (AT91C_PIO_PA26) // SSC Receive Frame Sync
2232 #define AT91C_PA26_NPCS12 (AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
DAT91SAM7X256_inc.h2230 #define AT91C_PIO_PA26 (1 << 26) // Pin Controlled by PA26 macro
2231 #define AT91C_PA26_RF (AT91C_PIO_PA26) // SSC Receive Frame Sync
2232 #define AT91C_PA26_NPCS12 (AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
DAT91SAM7S64.h1793 #define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 macro
1794 #define AT91C_PA26_DCD1 ((unsigned int) AT91C_PIO_PA26) // USART 1 Data Carrier Detect
1795 #define AT91C_PA26_TIOA2 ((unsigned int) AT91C_PIO_PA26) // Timer Counter 2 Multipurpose Timer …
DAT91SAM7X128.h2499 #define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 macro
2500 #define AT91C_PA26_RF ((unsigned int) AT91C_PIO_PA26) // SSC Receive Frame Sync
2501 #define AT91C_PA26_NPCS12 ((unsigned int) AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
DAT91SAM7X256.h2499 #define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 macro
2500 #define AT91C_PA26_RF ((unsigned int) AT91C_PIO_PA26) // SSC Receive Frame Sync
2501 #define AT91C_PA26_NPCS12 ((unsigned int) AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h2499 #define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 macro
2500 #define AT91C_PA26_RF ((unsigned int) AT91C_PIO_PA26) // SSC Receive Frame Sync
2501 #define AT91C_PA26_NPCS12 ((unsigned int) AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
Dioat91sam7x256.h2499 #define AT91C_PIO_PA26 ((unsigned int) 1 << 26) // Pin Controlled by PA26 macro
2500 #define AT91C_PA26_RF ((unsigned int) AT91C_PIO_PA26) // SSC Receive Frame Sync
2501 #define AT91C_PA26_NPCS12 ((unsigned int) AT91C_PIO_PA26) // SPI 1 Peripheral Chip Select 2
4480 AT91C_PIO_PA26 EQU (1 << 26) ;- Pin Controlled by PA26
4481 AT91C_PA26_RF EQU (AT91C_PIO_PA26) ;- SSC Receive Frame Sync
4482 AT91C_PA26_NPCS12 EQU (AT91C_PIO_PA26) ;- SPI 1 Peripheral Chip Select 2