Home
last modified time | relevance | path

Searched refs:AT91C_MC_FWS_3FWS (Results 1 – 8 of 8) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h513 #define AT91C_MC_FWS_3FWS (0x3 << 8) // (MC) 4 cycles for Read, 4 for Write op… macro
DAT91SAM7X128_inc.h437 #define AT91C_MC_FWS_3FWS (0x3 << 8) // (MC) 4 cycles for Read, 4 for Write op… macro
DAT91SAM7X256_inc.h437 #define AT91C_MC_FWS_3FWS (0x3 << 8) // (MC) 4 cycles for Read, 4 for Write op… macro
DAT91SAM7S64.h576 #define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read,… macro
DAT91SAM7X128.h640 #define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read,… macro
DAT91SAM7X256.h640 #define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read,… macro
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h640 #define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read,… macro
Dioat91sam7x256.h640 #define AT91C_MC_FWS_3FWS ((unsigned int) 0x3 << 8) // (MC) 4 cycles for Read,… macro
2979 AT91C_MC_FWS_3FWS EQU (0x3 << 8) ;- (MC) 4 cycles for Read, 4 for Write operations