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Searched refs:AT91C_ADC_CH5 (Results 1 – 8 of 8) sorted by relevance

/Kernel-v10.6.2/portable/IAR/AtmelSAM7S64/
DAT91SAM7S64_inc.h694 #define AT91C_ADC_CH5 (0x1 << 5) // (ADC) Channel 5 macro
DAT91SAM7X128_inc.h1414 #define AT91C_ADC_CH5 (0x1 << 5) // (ADC) Channel 5 macro
DAT91SAM7X256_inc.h1414 #define AT91C_ADC_CH5 (0x1 << 5) // (ADC) Channel 5 macro
DAT91SAM7S64.h765 #define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 macro
DAT91SAM7X128.h1671 #define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 macro
DAT91SAM7X256.h1671 #define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 macro
/Kernel-v10.6.2/portable/GCC/ARM7_AT91SAM7S/
DAT91SAM7X256.h1671 #define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 macro
Dioat91sam7x256.h1671 #define AT91C_ADC_CH5 ((unsigned int) 0x1 << 5) // (ADC) Channel 5 macro
3710 AT91C_ADC_CH5 EQU (0x1 << 5) ;- (ADC) Channel 5