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Searched refs:__IO (Results 1 – 7 of 7) sorted by relevance

/FreeRTOS-Plus-TCP-v4.0.0/source/portable/NetworkInterface/STM32Hxx/
Dreadme.md104 __IO uint32_t DMAMR; // ETH_DMAMR DMA mode register
105 __IO uint32_t DMAISR; // ETH_DMAISR DMA Interrupt status register
106 __IO uint32_t DMADSR; // ETH_DMADSR DMA Debug status register
107 __IO uint32_t DMACCR; // ETH_DMACCR DMA Channel control register
108 __IO uint32_t DMACTCR; // ETH_DMACTXCR Channel Tx transmit control register
109 __IO uint32_t DMACRCR; // ETH_DMACRXCR Channel Rx receive control register
110 __IO uint32_t DMACTDLAR; // ETH_DMACTXDLAR Channel Tx descriptor list address register
111 __IO uint32_t DMACRDLAR; // ETH_DMACRXDLAR Channel Rx descriptor list address register
112 __IO uint32_t DMACTDTPR; // ETH_DMACTXDTPR Channel TX tail pointer
113 __IO uint32_t DMACRDTPR; // ETH_DMACRXDTPR Channel RX tail pointer
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Dstm32hxx_hal_eth.h83 __IO uint32_t DESC0; /* The buffer */
88 __IO uint32_t DESC1;
93__IO uint32_t DESC2; /* Buffer 1 length (0x00003FFFU) Buffer 2 Length (0x3FFF0000) */
106 __IO uint32_t DESC3; /* bit 31 is the OWN (by DMA) bit */
524__IO HAL_ETH_StateTypeDef gState; /*!< ETH state information related to global Handle management
528__IO HAL_ETH_StateTypeDef RxState; /*!< ETH state information related to Rx operations.
531__IO uint32_t ErrorCode; /*!< Holds the global Error code of the ETH HAL status machine
534__IO uint32_t DMAErrorCode; /*!< Holds the DMA Rx Tx Error code when a DMA AIS interrupt oc…
537__IO uint32_t MACErrorCode; /*!< Holds the MAC Rx Tx Error code when a MAC Rx or Tx status …
540__IO uint32_t MACWakeUpEvent; /*!< Holds the Wake Up event when the MAC exit the power down m…
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DNetworkInterface.c228 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ulETH_MAC_ADDR_HBASE + ulIndex ) ) ) = ulTempReg; in prvMACAddressConfig()
234 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ulETH_MAC_ADDR_LBASE + ulIndex ) ) ) = ulTempReg; in prvMACAddressConfig()
1014 __IO const ETH_DMADescTypeDef * dmarxdesc = in uxGetOwnCount()
1015 ( __IO const ETH_DMADescTypeDef * )dmarxdesclist->RxDesc[ xIndex ]; in uxGetOwnCount()
Dstm32hxx_hal_eth.c1312 __IO const ETH_DMADescTypeDef * dma_rx_desc; in HAL_ETH_GetRxData()
1456__IO ETH_DMADescTypeDef * dmarxdesc = ( ETH_DMADescTypeDef * ) dmarxdesclist->RxDesc[ desc_index ]; in HAL_ETH_BuildRxDescriptors()
2269 …( *( __IO uint32_t * ) macaddrhr ) = ( ( ( uint32_t ) ( pMACAddr[ 5 ] ) << 8 ) | ( uint32_t ) pMAC… in HAL_ETH_SetSourceMACAddrMatch()
2271 …( *( __IO uint32_t * ) macaddrlr ) = ( ( ( uint32_t ) ( pMACAddr[ 3 ] ) << 24 ) | ( ( uint32_t ) (… in HAL_ETH_SetSourceMACAddrMatch()
2275 ( *( __IO uint32_t * ) macaddrhr ) |= ( ETH_MACAHR_SA | ETH_MACAHR_AE ); in HAL_ETH_SetSourceMACAddrMatch()
/FreeRTOS-Plus-TCP-v4.0.0/source/portable/NetworkInterface/STM32Fxx/
Dstm32fxx_hal_eth.c1401 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_HBASE + MacAddr ) ) ) = tmpreg; in ETH_MACAddressConfig()
1406 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_LBASE + MacAddr ) ) ) = tmpreg; in ETH_MACAddressConfig()
1443 __IO uint32_t tmpreg = heth->Instance->MACCR | ETH_MACCR_RE; in ETH_MACReceptionEnable()
1456 __IO uint32_t tmpreg = heth->Instance->MACCR & ~( ETH_MACCR_RE ); in ETH_MACReceptionDisable()
1470 __IO uint32_t tmpreg = heth->Instance->DMAOMR | ETH_DMAOMR_ST; in ETH_DMATransmissionEnable()
1484 __IO uint32_t tmpreg = heth->Instance->DMAOMR & ~( ETH_DMAOMR_ST ); in ETH_DMATransmissionDisable()
1498 __IO uint32_t tmpreg = heth->Instance->DMAOMR | ETH_DMAOMR_SR; in ETH_DMAReceptionEnable()
1512 __IO uint32_t tmpreg = heth->Instance->DMAOMR & ~( ETH_DMAOMR_SR ); in ETH_DMAReceptionDisable()
1526 __IO uint32_t tmpreg = heth->Instance->DMAOMR | ETH_DMAOMR_FTF; in ETH_FlushTransmitFIFO()
DNetworkInterface.c304 static __IO ETH_DMADescTypeDef * DMATxDescToClear;
407 __IO ETH_DMADescTypeDef * txLastDescriptor = xETH.TxDesc; in vClearTXBuffers()
775 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_HBASE + ulIndex ) ) ) = ulTempReg; in prvMACAddressConfig()
781 ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_LBASE + ulIndex ) ) ) = ulTempReg; in prvMACAddressConfig()
792 __IO ETH_DMADescTypeDef * pxDmaTxDesc; in xSTM32F_NetworkInterfaceOutput()
1085 __IO ETH_DMADescTypeDef * pxDMARxDescriptor; in prvNetworkInterfaceInput()
Dstm32fxx_hal_eth.h446 #ifdef __IO
447 #undef __IO
449 #define __IO macro
698 __IO uint32_t Status; /*!< Status */
752 __IO HAL_ETH_StateTypeDef State; /*!< ETH communication state */