1 /*
2 * FreeRTOS Kernel V10.6.2
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 #include <stdlib.h>
31
32 #include <avr/io.h>
33 #include <avr/interrupt.h>
34 #include <avr/wdt.h>
35
36 #include "FreeRTOS.h"
37 #include "task.h"
38
39 /*-----------------------------------------------------------
40 * Implementation of functions defined in portable.h for the AVR port.
41 *----------------------------------------------------------*/
42
43 /* Start tasks with interrupts enabled. */
44 #define portFLAGS_INT_ENABLED ( (StackType_t) 0x80 )
45
46 #if defined( portUSE_WDTO)
47 #warning "Watchdog Timer used for scheduler."
48 #define portSCHEDULER_ISR WDT_vect
49
50 #elif defined( portUSE_TIMER0 )
51 /* Hardware constants for Timer0. */
52 #warning "Timer0 used for scheduler."
53 #define portSCHEDULER_ISR TIMER0_COMPA_vect
54 #define portCLEAR_COUNTER_ON_MATCH ( (uint8_t) _BV(WGM01) )
55 #define portPRESCALE_1024 ( (uint8_t) (_BV(CS02)|_BV(CS00)) )
56 #define portCLOCK_PRESCALER ( (uint32_t) 1024 )
57 #define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( (uint8_t) _BV(OCIE0A) )
58 #define portOCRL OCR0A
59 #define portTCCRa TCCR0A
60 #define portTCCRb TCCR0B
61 #define portTIMSK TIMSK0
62 #define portTIFR TIFR0
63
64 #else
65 #error "No Timer defined for scheduler"
66 #endif
67
68 /*-----------------------------------------------------------*/
69
70 /* We require the address of the pxCurrentTCB variable, but don't want to know
71 any details of its type. */
72 typedef void TCB_t;
73 extern volatile TCB_t * volatile pxCurrentTCB;
74
75 /*-----------------------------------------------------------*/
76
77 /**
78 Enable the watchdog timer, configuring it for expire after
79 (value) timeout (which is a combination of the WDP0
80 through WDP3 bits).
81
82 This function is derived from <avr/wdt.h> but enables only
83 the interrupt bit (WDIE), rather than the reset bit (WDE).
84
85 Can't find it documented but the WDT, once enabled,
86 rolls over and fires a new interrupt each time.
87
88 See also the symbolic constants WDTO_15MS et al.
89
90 Updated to match avr-libc 2.0.0
91 */
92
93 #if defined( portUSE_WDTO)
94
95 static __inline__
96 __attribute__ ((__always_inline__))
wdt_interrupt_enable(const uint8_t value)97 void wdt_interrupt_enable (const uint8_t value)
98 {
99 if (_SFR_IO_REG_P (_WD_CONTROL_REG))
100 {
101 __asm__ __volatile__ (
102 "in __tmp_reg__,__SREG__" "\n\t"
103 "cli" "\n\t"
104 "wdr" "\n\t"
105 "out %0, %1" "\n\t"
106 "out __SREG__,__tmp_reg__" "\n\t"
107 "out %0, %2" "\n\t"
108 : /* no outputs */
109 : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
110 "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
111 "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
112 _BV(WDIF) | _BV(WDIE) | (value & 0x07)) )
113 : "r0"
114 );
115 }
116 else
117 {
118 __asm__ __volatile__ (
119 "in __tmp_reg__,__SREG__" "\n\t"
120 "cli" "\n\t"
121 "wdr" "\n\t"
122 "sts %0, %1" "\n\t"
123 "out __SREG__,__tmp_reg__" "\n\t"
124 "sts %0, %2" "\n\t"
125 : /* no outputs */
126 : "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
127 "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
128 "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
129 _BV(WDIF) | _BV(WDIE) | (value & 0x07)) )
130 : "r0"
131 );
132 }
133 }
134 #endif
135
136 /*-----------------------------------------------------------*/
137 /**
138 Enable the watchdog timer, configuring it for expire after
139 (value) timeout (which is a combination of the WDP0
140 through WDP3 bits).
141
142 This function is derived from <avr/wdt.h> but enables both
143 the reset bit (WDE), and the interrupt bit (WDIE).
144
145 This will ensure that if the interrupt is not serviced
146 before the second timeout, the AVR will reset.
147
148 Servicing the interrupt automatically clears it,
149 and ensures the AVR does not reset.
150
151 Can't find it documented but the WDT, once enabled,
152 rolls over and fires a new interrupt each time.
153
154 See also the symbolic constants WDTO_15MS et al.
155
156 Updated to match avr-libc 2.0.0
157 */
158
159 #if defined( portUSE_WDTO)
160
161 static __inline__
162 __attribute__ ((__always_inline__))
wdt_interrupt_reset_enable(const uint8_t value)163 void wdt_interrupt_reset_enable (const uint8_t value)
164 {
165 if (_SFR_IO_REG_P (_WD_CONTROL_REG))
166 {
167 __asm__ __volatile__ (
168 "in __tmp_reg__,__SREG__" "\n\t"
169 "cli" "\n\t"
170 "wdr" "\n\t"
171 "out %0, %1" "\n\t"
172 "out __SREG__,__tmp_reg__" "\n\t"
173 "out %0, %2" "\n\t"
174 : /* no outputs */
175 : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
176 "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
177 "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
178 _BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) )
179 : "r0"
180 );
181 }
182 else
183 {
184 __asm__ __volatile__ (
185 "in __tmp_reg__,__SREG__" "\n\t"
186 "cli" "\n\t"
187 "wdr" "\n\t"
188 "sts %0, %1" "\n\t"
189 "out __SREG__,__tmp_reg__" "\n\t"
190 "sts %0, %2" "\n\t"
191 : /* no outputs */
192 : "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
193 "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))),
194 "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
195 _BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) )
196 : "r0"
197 );
198 }
199 }
200 #endif
201
202 /*-----------------------------------------------------------*/
203
204 /*
205 * Macro to save all the general purpose registers, the save the stack pointer
206 * into the TCB.
207 *
208 * The first thing we do is save the flags then disable interrupts. This is to
209 * guard our stack against having a context switch interrupt after we have already
210 * pushed the registers onto the stack - causing the 32 registers to be on the
211 * stack twice.
212 *
213 * r1 is set to zero (__zero_reg__) as the compiler expects it to be thus, however
214 * some of the math routines make use of R1.
215 *
216 * r0 is set to __tmp_reg__ as the compiler expects it to be thus.
217 *
218 * #if defined(__AVR_HAVE_RAMPZ__)
219 * #define __RAMPZ__ 0x3B
220 * #endif
221 *
222 * #if defined(__AVR_3_BYTE_PC__)
223 * #define __EIND__ 0x3C
224 * #endif
225 *
226 * The interrupts will have been disabled during the call to portSAVE_CONTEXT()
227 * so we need not worry about reading/writing to the stack pointer.
228 */
229 #if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__)
230 /* 3-Byte PC Save with RAMPZ */
231 #define portSAVE_CONTEXT() \
232 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
233 "in __tmp_reg__, __SREG__ \n\t" \
234 "cli \n\t" \
235 "push __tmp_reg__ \n\t" \
236 "in __tmp_reg__, 0x3B \n\t" \
237 "push __tmp_reg__ \n\t" \
238 "in __tmp_reg__, 0x3C \n\t" \
239 "push __tmp_reg__ \n\t" \
240 "push __zero_reg__ \n\t" \
241 "clr __zero_reg__ \n\t" \
242 "push r2 \n\t" \
243 "push r3 \n\t" \
244 "push r4 \n\t" \
245 "push r5 \n\t" \
246 "push r6 \n\t" \
247 "push r7 \n\t" \
248 "push r8 \n\t" \
249 "push r9 \n\t" \
250 "push r10 \n\t" \
251 "push r11 \n\t" \
252 "push r12 \n\t" \
253 "push r13 \n\t" \
254 "push r14 \n\t" \
255 "push r15 \n\t" \
256 "push r16 \n\t" \
257 "push r17 \n\t" \
258 "push r18 \n\t" \
259 "push r19 \n\t" \
260 "push r20 \n\t" \
261 "push r21 \n\t" \
262 "push r22 \n\t" \
263 "push r23 \n\t" \
264 "push r24 \n\t" \
265 "push r25 \n\t" \
266 "push r26 \n\t" \
267 "push r27 \n\t" \
268 "push r28 \n\t" \
269 "push r29 \n\t" \
270 "push r30 \n\t" \
271 "push r31 \n\t" \
272 "lds r26, pxCurrentTCB \n\t" \
273 "lds r27, pxCurrentTCB + 1 \n\t" \
274 "in __tmp_reg__, __SP_L__ \n\t" \
275 "st x+, __tmp_reg__ \n\t" \
276 "in __tmp_reg__, __SP_H__ \n\t" \
277 "st x+, __tmp_reg__ \n\t" \
278 );
279 #elif defined(__AVR_HAVE_RAMPZ__)
280 /* 2-Byte PC Save with RAMPZ */
281 #define portSAVE_CONTEXT() \
282 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
283 "in __tmp_reg__, __SREG__ \n\t" \
284 "cli \n\t" \
285 "push __tmp_reg__ \n\t" \
286 "in __tmp_reg__, 0x3B \n\t" \
287 "push __tmp_reg__ \n\t" \
288 "push __zero_reg__ \n\t" \
289 "clr __zero_reg__ \n\t" \
290 "push r2 \n\t" \
291 "push r3 \n\t" \
292 "push r4 \n\t" \
293 "push r5 \n\t" \
294 "push r6 \n\t" \
295 "push r7 \n\t" \
296 "push r8 \n\t" \
297 "push r9 \n\t" \
298 "push r10 \n\t" \
299 "push r11 \n\t" \
300 "push r12 \n\t" \
301 "push r13 \n\t" \
302 "push r14 \n\t" \
303 "push r15 \n\t" \
304 "push r16 \n\t" \
305 "push r17 \n\t" \
306 "push r18 \n\t" \
307 "push r19 \n\t" \
308 "push r20 \n\t" \
309 "push r21 \n\t" \
310 "push r22 \n\t" \
311 "push r23 \n\t" \
312 "push r24 \n\t" \
313 "push r25 \n\t" \
314 "push r26 \n\t" \
315 "push r27 \n\t" \
316 "push r28 \n\t" \
317 "push r29 \n\t" \
318 "push r30 \n\t" \
319 "push r31 \n\t" \
320 "lds r26, pxCurrentTCB \n\t" \
321 "lds r27, pxCurrentTCB + 1 \n\t" \
322 "in __tmp_reg__, __SP_L__ \n\t" \
323 "st x+, __tmp_reg__ \n\t" \
324 "in __tmp_reg__, __SP_H__ \n\t" \
325 "st x+, __tmp_reg__ \n\t" \
326 );
327 #else
328 /* 2-Byte PC Save */
329 #define portSAVE_CONTEXT() \
330 __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
331 "in __tmp_reg__, __SREG__ \n\t" \
332 "cli \n\t" \
333 "push __tmp_reg__ \n\t" \
334 "push __zero_reg__ \n\t" \
335 "clr __zero_reg__ \n\t" \
336 "push r2 \n\t" \
337 "push r3 \n\t" \
338 "push r4 \n\t" \
339 "push r5 \n\t" \
340 "push r6 \n\t" \
341 "push r7 \n\t" \
342 "push r8 \n\t" \
343 "push r9 \n\t" \
344 "push r10 \n\t" \
345 "push r11 \n\t" \
346 "push r12 \n\t" \
347 "push r13 \n\t" \
348 "push r14 \n\t" \
349 "push r15 \n\t" \
350 "push r16 \n\t" \
351 "push r17 \n\t" \
352 "push r18 \n\t" \
353 "push r19 \n\t" \
354 "push r20 \n\t" \
355 "push r21 \n\t" \
356 "push r22 \n\t" \
357 "push r23 \n\t" \
358 "push r24 \n\t" \
359 "push r25 \n\t" \
360 "push r26 \n\t" \
361 "push r27 \n\t" \
362 "push r28 \n\t" \
363 "push r29 \n\t" \
364 "push r30 \n\t" \
365 "push r31 \n\t" \
366 "lds r26, pxCurrentTCB \n\t" \
367 "lds r27, pxCurrentTCB + 1 \n\t" \
368 "in __tmp_reg__, __SP_L__ \n\t" \
369 "st x+, __tmp_reg__ \n\t" \
370 "in __tmp_reg__, __SP_H__ \n\t" \
371 "st x+, __tmp_reg__ \n\t" \
372 );
373 #endif
374
375 /*
376 * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
377 * the context save so we can write to the stack pointer.
378 */
379 #if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__)
380 /* 3-Byte PC Restore with RAMPZ */
381 #define portRESTORE_CONTEXT() \
382 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
383 "lds r27, pxCurrentTCB + 1 \n\t" \
384 "ld r28, x+ \n\t" \
385 "out __SP_L__, r28 \n\t" \
386 "ld r29, x+ \n\t" \
387 "out __SP_H__, r29 \n\t" \
388 "pop r31 \n\t" \
389 "pop r30 \n\t" \
390 "pop r29 \n\t" \
391 "pop r28 \n\t" \
392 "pop r27 \n\t" \
393 "pop r26 \n\t" \
394 "pop r25 \n\t" \
395 "pop r24 \n\t" \
396 "pop r23 \n\t" \
397 "pop r22 \n\t" \
398 "pop r21 \n\t" \
399 "pop r20 \n\t" \
400 "pop r19 \n\t" \
401 "pop r18 \n\t" \
402 "pop r17 \n\t" \
403 "pop r16 \n\t" \
404 "pop r15 \n\t" \
405 "pop r14 \n\t" \
406 "pop r13 \n\t" \
407 "pop r12 \n\t" \
408 "pop r11 \n\t" \
409 "pop r10 \n\t" \
410 "pop r9 \n\t" \
411 "pop r8 \n\t" \
412 "pop r7 \n\t" \
413 "pop r6 \n\t" \
414 "pop r5 \n\t" \
415 "pop r4 \n\t" \
416 "pop r3 \n\t" \
417 "pop r2 \n\t" \
418 "pop __zero_reg__ \n\t" \
419 "pop __tmp_reg__ \n\t" \
420 "out 0x3C, __tmp_reg__ \n\t" \
421 "pop __tmp_reg__ \n\t" \
422 "out 0x3B, __tmp_reg__ \n\t" \
423 "pop __tmp_reg__ \n\t" \
424 "out __SREG__, __tmp_reg__ \n\t" \
425 "pop __tmp_reg__ \n\t" \
426 );
427 #elif defined(__AVR_HAVE_RAMPZ__)
428 /* 2-Byte PC Restore with RAMPZ */
429 #define portRESTORE_CONTEXT() \
430 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
431 "lds r27, pxCurrentTCB + 1 \n\t" \
432 "ld r28, x+ \n\t" \
433 "out __SP_L__, r28 \n\t" \
434 "ld r29, x+ \n\t" \
435 "out __SP_H__, r29 \n\t" \
436 "pop r31 \n\t" \
437 "pop r30 \n\t" \
438 "pop r29 \n\t" \
439 "pop r28 \n\t" \
440 "pop r27 \n\t" \
441 "pop r26 \n\t" \
442 "pop r25 \n\t" \
443 "pop r24 \n\t" \
444 "pop r23 \n\t" \
445 "pop r22 \n\t" \
446 "pop r21 \n\t" \
447 "pop r20 \n\t" \
448 "pop r19 \n\t" \
449 "pop r18 \n\t" \
450 "pop r17 \n\t" \
451 "pop r16 \n\t" \
452 "pop r15 \n\t" \
453 "pop r14 \n\t" \
454 "pop r13 \n\t" \
455 "pop r12 \n\t" \
456 "pop r11 \n\t" \
457 "pop r10 \n\t" \
458 "pop r9 \n\t" \
459 "pop r8 \n\t" \
460 "pop r7 \n\t" \
461 "pop r6 \n\t" \
462 "pop r5 \n\t" \
463 "pop r4 \n\t" \
464 "pop r3 \n\t" \
465 "pop r2 \n\t" \
466 "pop __zero_reg__ \n\t" \
467 "pop __tmp_reg__ \n\t" \
468 "out 0x3B, __tmp_reg__ \n\t" \
469 "pop __tmp_reg__ \n\t" \
470 "out __SREG__, __tmp_reg__ \n\t" \
471 "pop __tmp_reg__ \n\t" \
472 );
473 #else
474 /* 2-Byte PC Restore */
475 #define portRESTORE_CONTEXT() \
476 __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
477 "lds r27, pxCurrentTCB + 1 \n\t" \
478 "ld r28, x+ \n\t" \
479 "out __SP_L__, r28 \n\t" \
480 "ld r29, x+ \n\t" \
481 "out __SP_H__, r29 \n\t" \
482 "pop r31 \n\t" \
483 "pop r30 \n\t" \
484 "pop r29 \n\t" \
485 "pop r28 \n\t" \
486 "pop r27 \n\t" \
487 "pop r26 \n\t" \
488 "pop r25 \n\t" \
489 "pop r24 \n\t" \
490 "pop r23 \n\t" \
491 "pop r22 \n\t" \
492 "pop r21 \n\t" \
493 "pop r20 \n\t" \
494 "pop r19 \n\t" \
495 "pop r18 \n\t" \
496 "pop r17 \n\t" \
497 "pop r16 \n\t" \
498 "pop r15 \n\t" \
499 "pop r14 \n\t" \
500 "pop r13 \n\t" \
501 "pop r12 \n\t" \
502 "pop r11 \n\t" \
503 "pop r10 \n\t" \
504 "pop r9 \n\t" \
505 "pop r8 \n\t" \
506 "pop r7 \n\t" \
507 "pop r6 \n\t" \
508 "pop r5 \n\t" \
509 "pop r4 \n\t" \
510 "pop r3 \n\t" \
511 "pop r2 \n\t" \
512 "pop __zero_reg__ \n\t" \
513 "pop __tmp_reg__ \n\t" \
514 "out __SREG__, __tmp_reg__ \n\t" \
515 "pop __tmp_reg__ \n\t" \
516 );
517 #endif
518 /*-----------------------------------------------------------*/
519
520 /*
521 * Perform hardware setup to enable ticks from relevant Timer.
522 */
523 static void prvSetupTimerInterrupt( void );
524 /*-----------------------------------------------------------*/
525
526 /*
527 * See header file for description.
528 */
pxPortInitialiseStack(StackType_t * pxTopOfStack,TaskFunction_t pxCode,void * pvParameters)529 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
530 {
531 uint16_t usAddress;
532 /* Simulate how the stack would look after a call to vPortYield() generated by
533 the compiler. */
534
535 /* The start of the task code will be popped off the stack last, so place
536 it on first. */
537 usAddress = ( uint16_t ) pxCode;
538 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
539 pxTopOfStack--;
540
541 usAddress >>= 8;
542 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
543 pxTopOfStack--;
544
545 #if defined(__AVR_3_BYTE_PC__)
546 /* The AVR ATmega2560/ATmega2561 have 256KBytes of program memory and a 17-bit
547 * program counter. When a code address is stored on the stack, it takes 3 bytes
548 * instead of 2 for the other ATmega* chips.
549 *
550 * Store 0 as the top byte since we force all task routines to the bottom 128K
551 * of flash. We do this by using the .lowtext label in the linker script.
552 *
553 * In order to do this properly, we would need to get a full 3-byte pointer to
554 * pxCode. That requires a change to GCC. Not likely to happen any time soon.
555 */
556 *pxTopOfStack = 0;
557 pxTopOfStack--;
558 #endif
559
560 /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
561 portSAVE_CONTEXT places the flags on the stack immediately after r0
562 to ensure the interrupts get disabled as soon as possible, and so ensuring
563 the stack use is minimal should a context switch interrupt occur. */
564 *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
565 pxTopOfStack--;
566 *pxTopOfStack = portFLAGS_INT_ENABLED;
567 pxTopOfStack--;
568
569 #if defined(__AVR_3_BYTE_PC__)
570 /* If we have an ATmega256x, we are also saving the EIND register.
571 * We should default to 0.
572 */
573 *pxTopOfStack = ( StackType_t ) 0x00; /* EIND */
574 pxTopOfStack--;
575 #endif
576
577 #if defined(__AVR_HAVE_RAMPZ__)
578 /* We are saving the RAMPZ register.
579 * We should default to 0.
580 */
581 *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
582 pxTopOfStack--;
583 #endif
584
585 /* Now the remaining registers. The compiler expects R1 to be 0. */
586 *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
587
588 /* Leave R2 - R23 untouched */
589 pxTopOfStack -= 23;
590
591 /* Place the parameter on the stack in the expected location. */
592 usAddress = ( uint16_t ) pvParameters;
593 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
594 pxTopOfStack--;
595
596 usAddress >>= 8;
597 *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
598
599 /* Leave register R26 - R31 untouched */
600 pxTopOfStack -= 7;
601
602 return pxTopOfStack;
603 }
604 /*-----------------------------------------------------------*/
605
xPortStartScheduler(void)606 BaseType_t xPortStartScheduler( void )
607 {
608 /* Setup the relevant timer hardware to generate the tick. */
609 prvSetupTimerInterrupt();
610
611 /* Restore the context of the first task that is going to run. */
612 portRESTORE_CONTEXT();
613
614 /* Simulate a function call end as generated by the compiler. We will now
615 jump to the start of the task the context of which we have just restored. */
616 __asm__ __volatile__ ( "ret" );
617
618 /* Should not get here. */
619 return pdTRUE;
620 }
621 /*-----------------------------------------------------------*/
622
vPortEndScheduler(void)623 void vPortEndScheduler( void )
624 {
625 /* It is unlikely that the ATmega port will get stopped. */
626 }
627 /*-----------------------------------------------------------*/
628
629 /*
630 * Manual context switch. The first thing we do is save the registers so we
631 * can use a naked attribute.
632 */
633 void vPortYield( void ) __attribute__ ( ( hot, flatten, naked ) );
vPortYield(void)634 void vPortYield( void )
635 {
636 portSAVE_CONTEXT();
637 vTaskSwitchContext();
638 portRESTORE_CONTEXT();
639
640 __asm__ __volatile__ ( "ret" );
641 }
642 /*-----------------------------------------------------------*/
643
644 /*
645 * Manual context switch callable from ISRs. The first thing we do is save
646 * the registers so we can use a naked attribute.
647 */
648 void vPortYieldFromISR(void) __attribute__ ( ( hot, flatten, naked ) );
vPortYieldFromISR(void)649 void vPortYieldFromISR(void)
650 {
651 portSAVE_CONTEXT();
652 vTaskSwitchContext();
653 portRESTORE_CONTEXT();
654
655 __asm__ __volatile__ ( "reti" );
656 }
657 /*-----------------------------------------------------------*/
658
659 /*
660 * Context switch function used by the tick. This must be identical to
661 * vPortYield() from the call to vTaskSwitchContext() onwards. The only
662 * difference from vPortYield() is the tick count is incremented as the
663 * call comes from the tick ISR.
664 */
665 void vPortYieldFromTick( void ) __attribute__ ( ( hot, flatten, naked ) );
vPortYieldFromTick(void)666 void vPortYieldFromTick( void )
667 {
668 portSAVE_CONTEXT();
669 if( xTaskIncrementTick() != pdFALSE )
670 {
671 vTaskSwitchContext();
672 }
673 portRESTORE_CONTEXT();
674
675 __asm__ __volatile__ ( "ret" );
676 }
677 /*-----------------------------------------------------------*/
678
679 #if defined(portUSE_WDTO)
680 /*
681 * Setup WDT to generate a tick interrupt.
682 */
prvSetupTimerInterrupt(void)683 void prvSetupTimerInterrupt( void )
684 {
685 /* reset watchdog */
686 wdt_reset();
687
688 /* set up WDT Interrupt (rather than the WDT Reset). */
689 wdt_interrupt_enable( portUSE_WDTO );
690 }
691
692 #elif defined (portUSE_TIMER0)
693 /*
694 * Setup Timer0 compare match A to generate a tick interrupt.
695 */
prvSetupTimerInterrupt(void)696 static void prvSetupTimerInterrupt( void )
697 {
698 uint32_t ulCompareMatch;
699 uint8_t ucLowByte;
700
701 /* Using 8bit Timer0 to generate the tick. Correct fuses must be
702 selected for the configCPU_CLOCK_HZ clock.*/
703
704 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
705
706 /* We only have 8 bits so have to scale 1024 to get our required tick rate. */
707 ulCompareMatch /= portCLOCK_PRESCALER;
708
709 /* Adjust for correct value. */
710 ulCompareMatch -= ( uint32_t ) 1;
711
712 /* Setup compare match value for compare match A. Interrupts are disabled
713 before this is called so we need not worry here. */
714 ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
715 portOCRL = ucLowByte;
716
717 /* Setup clock source and compare match behaviour. */
718 portTCCRa = portCLEAR_COUNTER_ON_MATCH;
719 portTCCRb = portPRESCALE_1024;
720
721
722 /* Enable the interrupt - this is okay as interrupt are currently globally disabled. */
723 ucLowByte = portTIMSK;
724 ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE;
725 portTIMSK = ucLowByte;
726 }
727
728 #endif
729
730 /*-----------------------------------------------------------*/
731
732 #if configUSE_PREEMPTION == 1
733
734 /*
735 * Tick ISR for preemptive scheduler. We can use a naked attribute as
736 * the context is saved at the start of vPortYieldFromTick(). The tick
737 * count is incremented after the context is saved.
738 *
739 * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
740 *
741 */
742 ISR(portSCHEDULER_ISR, ISR_NAKED) __attribute__ ((hot, flatten));
743 /* ISR(portSCHEDULER_ISR, ISR_NAKED ISR_NOBLOCK) __attribute__ ((hot, flatten));
744 */
ISR(portSCHEDULER_ISR)745 ISR(portSCHEDULER_ISR)
746 {
747 vPortYieldFromTick();
748 __asm__ __volatile__ ( "reti" );
749 }
750 #else
751
752 /*
753 * Tick ISR for the cooperative scheduler. All this does is increment the
754 * tick count. We don't need to switch context, this can only be done by
755 * manual calls to taskYIELD();
756 *
757 * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
758 */
759 ISR(portSCHEDULER_ISR) __attribute__ ((hot, flatten));
760 /* ISR(portSCHEDULER_ISR, ISR_NOBLOCK) __attribute__ ((hot, flatten));
761 */
ISR(portSCHEDULER_ISR)762 ISR(portSCHEDULER_ISR)
763 {
764 xTaskIncrementTick();
765 }
766 #endif
767
